FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP


Honored Contributor II


I'm doing a ethernet application to comunicate with nios II system. My board is a Nios II development board Stratix II (EP2S60F672C3N ) version. 


The NIOSII firmware is a modified simple socket server (works over lan91c111). In this way, i need to know what depends the value of SSS_*X_BUF_SIZE... 

The default value is 1500 but it's possible increase it. what is the max value? or what is the issue that depends this value???? 



Thanks for your reply  


Pd.sorry if this subject is done before but i was looking for and i didn't find it. 

Pd2. I'm not sure that is placed in the right place.
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