FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6355 Discussions

Stream to Memory sgdma transfers

Altera_Forum
Honored Contributor II
912 Views

I am trying to do a stream-to-memory sgdma transfer using the start of packet and end of packet signals.  

 

My question is how do I set up the descriptors for this type of transfer? 

 

Do I need to call the function alt_avalon_sgdma_do_async_transfer() ? 

 

Thanks in advance for your help.
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
244 Views

Yes, but before you need to call a function to make the descriptor for you. You will need to create a chain of two descriptors (the second one having the OWNED_BY_HW bit set to 0 to stop the SGDMA). There are some functions in the driver that can make a stream-to-memory descriptor for you. If you put 0 as length, the SGDMA will transfer data until it meets an end-of-packet signal. 

Have a look at the datasheet (http://www.altera.com/literature/ug/ug_embedded_ip.pdf), pages 25-6 to 25-8 and 25-16 to 25-22.
0 Kudos
Altera_Forum
Honored Contributor II
244 Views

Thanks for your reply. My solution right now is to start the DMA transfer after a hardware interrupt executes a callback function ( using the do_async_transfer ). I would like to know if the start of packet signal can be used to start the dma transfer. Does the start of packet signal have any functionality in the sgdma controller?

0 Kudos
Altera_Forum
Honored Contributor II
244 Views

No AFAIK the SGDMA core completely ignores the start of packet. It will just ready any stream data you give it, until it sees an end of packet. 

You can start a transfer with do_async_transfer even if there is no packet yet on the stream. In that case the SGDMA core will just wait, and start transferring data when the packet arrives.
0 Kudos
Reply