Uniphy DDR3 SDRAM Latency

[lcoon1981]

Hi,

I came across below table in the External memory Interface handbook Volume 3. Could you further explain what are the Even Write, Even Read, Odd Write, and Odd Read?

Thank you!

[AdzimZM_Intel]

Hello,

I believe these odd write latency and odd read latency are the setting we set in the IP.

• Odd/even is the number we set. Example, 5 (odd) or 6 (even).
• write latency is CL = CAS latency
• read latency is CWL = CAS write latency

Regards,

Adzim

[AdzimZM_Intel]

Hello,

Do you have any further questions or feedback in this forum?

Regards,

Adzim

[lcoon1981]

Hi Adzim,

I have no more questions. 

Thank you for the support!

Regards,
~lcoon1981