University Program IP - RS232 UART

[pki_rh]

I'm trying to generate and instantiate a UART using the University Program IP (RS232 UART) and Quartus Prime Lite (ver 21.1). Quartus displays the following error when I try to synthesize the project: "Error (12006): Node instance "rs232_0" instantiates undefined entity "uart_rs232_0". Ensure that required library paths are specified correctly, define the specified entity, or change the instantiation. If this entity represents Intel FPGA or third-party IP, generate the synthesis files for the IP." From what I can tell, the "uart_rs232_0.v" file and its submodule files are included in the project files section. Any ideas how to remedy the error? Thanks! Rich

[AminT_Intel]

Hello,

To work around this problem, you can open Altera Parallel Flash Loader II IP and regenerate HDL files manually.

Thank you.

[pki_rh]

Andy Lee at Arrow recommended copying the .vhd and .v files from the "synthesis" and "submodules" folders to the main project folder.  Doing so remedies the 12006 error shown above.  Andy's email is below.

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From: Andy Lee    

You can add those files in assignments->settings->files and some people do it that way, but I prefer to copy them into the project directory.  Anything in the project directory will get automatically picked up.

But, it is a personal preference, if you were to make changes to that IP, and regenerate it, you would have to copy the files over again.  I think Altera recommends doing it that way because you could ostensibly create different versions of that IP and keep them around as you try different things out, maybe not for a uart, but for something that might need different revisions to achieve different things.

Andy

[AminT_Intel]

Hello,

Thank you for the suggestion.

[AminT_Intel]

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