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V-Series Avalon-MM DMA Interface for PCIe Solutions

Honored Contributor II

Hi to all, 

I'm using the V-Series Avalon-MM DMA Interface for PCIe with an external descriptor. 

In order to support multi-DMA channels, I implemented two DMA Multi-Channel Controller Example Design (see fig 1). 

Unfortunately my architecture doesn't work properly. In fig.2 the bug (fig 3 and 4 for details) Fig 3: The first read (in orange) of 8 words @ 256bit ends. The second read (green) of 48 words @256bit is divided by the DMA Multi-Channel 

Controller into 3 subdescriptors with a payload size of 16 words; 

the processing READ A is completed. Fig.4 

Four write-operation (white and yellow) end properly.  

Finally the READ B (in red) of 48 words @256bit (generated by the same descriptor of READ A), 

doesn't end... The problem does not occur in case of smaller READ A e B. Thanks Francesca
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