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Honored Contributor I

cyclone III with ddr2, failed.

When test my hardware, it failed to pass the ddr2 test. 


Using the Mega Wizard Generated DDR2 (HPC II) example design to test my hardware, it failed. 

Following is my steps: 

1. Following the ALTEMEPHY Design Tutorials for Cyclone III, and using signaltap, found that the pnf is always low. The timequest timing analyzer is OK. 

2. Added ctl_cal_success, ctl_cal_fail, ctl_wlat, ctl_rlat to signaltap, ctl_cal_success is ‘1’, ctl_cal_fail is ‘0’, ctl_wlat = 0x00, ctl_rlat = 0x1B. pnf still ‘0’. 

3. Add Debug Toolkit to project following the External Memory Interface Handbook, Section III Debugging. In signaltap, the ctl_cal_success = ‘0’ and ctl_cal_fail = ‘1’. 

4. Removed the Debug Toolkit from project, then the calibration success again. ctl_cal_success is ‘1’, ctl_cal_fail is ‘0’. 


FPGA is EP3C55F484C8 

Ddr2 is SAMSUNG k4t51163QG x 2  


Please help, thanks.
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