eSPI Agent Core, bug in WAIT_STATE response

[WFitt]

Hello,

We are using Intel eSPI Agent Core in Intel FPGA MAX 10.

Now we possibly found a bug in the Intel eSPI Agent:

The bits 15:12 ("Maximum WAIT STATE Allowed") of the General Capabilites and Configuration Register are set to 0x0 (default value). That means 16 byte time wait states max. are allowed. 

The eSPI Agent is responding always 16 bytes of WAIT_STATE before ACCEPT or DEFER regardless of the command responding to.

This behaviour could lead to much lower performance on the eSPI bus!

Regards

Wolfram

[hareesh]

Hi,

sorry for late responding.

can you please share your platform design file and i want to know how did you find out that issue and what steps did you followed. can you please share that information?

it helps us to identify issue.

Thanks,

[TTBNSTOCK]

Good job

[hareesh]

please share that information

[WFitt]

Hi,

we are using an own mainboard with an Intel Elkhart Lake CPU module. The Elkhart Lake CPU is communicating via eSPI with an Intel FPGA  on our mainboard. At the moment we use eSPI with 20 MHz eSpi clock and Single I/O mode. The IP clock is 130 MHz.

During CPU BIOS booting we can see many transactions between Host (CPU) and Agent (FPGA):

21	00	08	10								GET CONFIGURATION
21	00	20	C8								GET CONFIGURATION
22	00	20	01	00	07	00	01				SET CONFIGURATION
21	00	20	C8								GET CONFIGURATION
05	1B										GET_VWIRE
21	00	30	B8								GET CONFIGURATION
22	00	30	00	01	00	00	25				SET CONFIGURATION
22	00	08	03	00	20	00	95				SET CONFIGURATION
22	00	20	01	00	07	00	01				SET CONFIGURATION
22	00	30	00	01	00	00	25				SET CONFIGURATION
21	00	40	EF								GET CONFIGURATION
22	00	40	0C	11	00	00	F1				SET CONFIGURATION
04	03	02	70	03	30	41	BA	42	30	11	PUT_VWIRE
04	01	43	F0	44	F0	DA					PUT_VWIRE
04	03	02	70	03	30	41	BB	42	30	7A	PUT_VWIRE
25	FB										GET_STATUS
05	1B										GET_VWIRE
04	03	02	70	03	30	41	B9	42	30	AC	PUT_VWIRE
04	03	02	74	03	30	41	B9	42	30	D9	PUT_VWIRE
04	03	02	76	03	30	41	B9	42	30	60	PUT_VWIRE
04	03	02	77	03	30	41	B9	42	30	BF	PUT_VWIRE
04	03	02	77	03	30	41	B9	42	32	B1	PUT_VWIRE
04	03	02	77	03	31	41	B9	42	32	D3	PUT_VWIRE
21	00	10	58								GET CONFIGURATION
04	03	02	77	03	33	41	B9	42	32	17	PUT_VWIRE
21	00	10	58								GET CONFIGURATION
22	00	10	01	11	00	00	F5				SET CONFIGURATION
45	00	80	15	9B	F0						IOWR
											160 other Port 80h I/O writes
21	00	10	58								GET CONFIGURATION
22	00	10	17	11	00	00	E6				SET CONFIGURATION
21	00	10	58								GET CONFIGURATION
4F	FE	0B	00	00	78	56	34	12	FF		PUT_MEMWR32_SHORT

The Agent is responding always with ACCEPT. But always before the ACCEPT response 16 WAIT_STATE are sent by Agent. We detected this issue with oscilloscope and with Intel Quartus SignalTap.

Regards

Wolfram

[hareesh]

Hi,

i also working on this issue. just for conformation can you please share your platform design file or screenshot

[WFitt]

Hi,

In the attachment you can find two screenshots.

The first is showing a GET_CONFIGURATION command:

21

00

08

10

The Agent Core is answering after 16 WAIT_STATEs

The second attachment is showing a PUT_MEMWR32_SHORT command

FE

0B

00

00

78

56

34

12

FF

The Agent Core is answering after 16 WAIT_STATES also.

[hareesh]

Hi,

please check bellow attachment. actually wait state value configure by Master please check that

[WFitt]

Hi,

bits 15:12 of the General Capabilities and Configurations Register is set to the default value 0000b by the master. This means: Maximum 16 Waite States allowed.

But this does not mean that the slave has to use 16 Wait States for every (!) response, even for simple accesses like GET_CONFIGURATION.

But the Intel eSPI Agent core does exactly this!

Kind Regards

Wolfram

[hareesh]

i am debugging that just give me some time.

[hareesh]

Hi,

please share you eSPI ip configuration details. like bellow attached one

i seen 3 cases related to eSPI from you. are you using same ip configuration for all cases for different. if different please share all cases configuration details. 

[WFitt]

Hi,

I wish you a happy new year!

I am using the same configuration for all cases:

Regards

Wolfram

[hareesh]

Hi,

may how you are testing this?

if you are testing on modelsim or questasim pls share project file.

or else share how your testing processing.

Thank you,

[hareesh]

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.