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how to run an example of Intel LL 10G MAC IP? I get similar errors in both examples. Please advice

PVanL
Novice
433 Views

i am trying to run the LL 10G MAC examples, i found one at https://fpgawiki.intel.com/wiki/Low_Latency_Ethernet_10G_MAC_using_Arria_10_PHY_10GBASE-R_Register_M... and there is one provided with the Quartus software.

For both examples, when comping the avalon_driver.sv component, I get errors as described below: (snippet 1), for the fpgawiki example

or for the Quartus provide example see snippet 2

# SILENCE -- Set to true to suppress all informational and/or warning messages in the generated simulation script. # # FORCE_MODELSIM_AE_SELECTION -- Set to true to force to select Modelsim AE always. # [exec] dev_com # Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017 # Start time: 12:39:20 on Jun 27,2019 # vlog -reportprogress 300 C:/intelFPGA/18.0/quartus/eda/sim_lib/altera_primitives.v -work altera_ver # ** Error: (vlog-7) Failed to open design unit file "C:/intelFPGA/18.0/quartus/eda/sim_lib/altera_primitives.v" in read mode. # No such file or directory. (errno = ENOENT) # End time: 12:39:21 on Jun 27,2019, Elapsed time: 0:00:01 # Errors: 1, Warnings: 0 # ** Error: C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed. # Error in macro ./tb_run.tcl line 29 # C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed. # while executing # "vlog C:/intelFPGA/18.0/quartus/eda/sim_lib/altera_primitives.v -work altera_ver" # ("eval" body line 1) # invoked from within # "eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v" ..." # invoked from within # "if [string is false -strict [modelsim_ae_select $FORCE_MODELSIM_AE_SELECTION]] { # eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_CO..." # ("eval" body line 5) # invoked from within # "dev_com "

 

# -- Compiling module altera_eth_top # -- Compiling package avalon_if_params_pkt # -- Compiling module avalon_bfm_wrapper # -- Importing package avalon_if_params_pkt # ** Warning: ** while parsing file included at ../avalon_driver.sv(4) # ** at avalon_if_params_pkg.sv(5): (vlog-2275) 'avalon_if_params_pkt' already exists and will be overwritten. # -- Compiling package avalon_if_params_pkt # ** Warning: ** while parsing file included at ../avalon_driver.sv(5) # ** at avalon_bfm_wrapper.sv(9): (vlog-2275) 'avalon_bfm_wrapper' already exists and will be overwritten. # -- Compiling module avalon_bfm_wrapper # ** Error: ../avalon_driver.sv(50): (vlog-13006) Could not find the package (eth_register_map_params_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line. # ** Warning: ../avalon_if_params_pkg.sv(5): (vlog-2275) 'avalon_if_params_pkt' already exists and will be overwritten. # ** Error: ../eth_mac_frame.sv(5): Typedef 'eth_mac_frame' multiply defined. # ** Error: ** while parsing file included at ../tb.sv(5) # ** while parsing file included at avalon_driver.sv(6) # ** at eth_mac_frame.sv(5): Typedef 'eth_mac_frame' multiply defined. # End time: 12:26:47 on Jun 27,2019, Elapsed time: 0:00:00 # Errors: 3, Warnings: 3 # ** Error: C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed. # Error in macro ./tb_run.tcl line 50 # C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed. # while executing # "vlog -work work ../*.*v"

 

0 Kudos
3 Replies
AndyN
New Contributor I
221 Views

Are you trying to use the Starter Edition of Modelsim or the payed version? There's a bug with the dev_com using Starter Edition in 18.0

PVanL
Novice
221 Views

Hi AndyN,

Thanks, i am using the starter edition. ModelSim - Intel FPGA Edition vcom 10.6c Compiler 2017.07 Jul 26 2017.

i also submitted this issue on Forum.Intel, a little bit different, and looking again at transcript, i am not so sure if it is dev_com, see the snippet below.

 

vlog-13006) Could not find the package (avalon_mm_pkg). See line 32, 33 in Transcript Code generated by modelsim.

Where can i find this avalon_mm_pkg.sv code, and where should i put it?

i built a PHY for the cyclone10GX. I now want to connect the LL 10G MAC to it, and as test now trying to run the alt_em_10g32_EXAMPLE_DESIGN generated by QUARTUS version 18.0.0 build 219 04/24/2018 SJ Pro Edition with Cyclone10GX libraries. Modelsim version starter edition 10.6C, revision 2017.07.

I managed to get the msim_setup.tcl script running, until i face the following issue : when it compiles avalon_driver.sv, in line 66 it wants to import avalon_mm_pkg, but this file does not exist.

Modelsim reports (after compiling a lot of cyclone stuff)   : see snippet, where in line 15 [exec] dev_com stops, and [exec] com starts

# Top level modules: # End time: 18:02:38 on Jun 25,2019, Elapsed time: 0:00:08 # Errors: 0, Warnings: 584 # Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017 # Start time: 18:02:38 on Jun 25,2019 # vlog -reportprogress 300 C:/intelfpga_pro/18.0/quartus/eda/sim_lib/cyclone10gx_hip_atoms.v -work cyclone10gx_hip_ver # -- Compiling module cyclone10gx_hssi_gen3_x8_pcie_hip # -- Compiling module twentynm_hssi_gen3_x8_pcie_hip # # Top level modules: # cyclone10gx_hssi_gen3_x8_pcie_hip # twentynm_hssi_gen3_x8_pcie_hip # End time: 18:02:38 on Jun 25,2019, Elapsed time: 0:00:00 # Errors: 0, Warnings: 0 # [exec] com # Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017 # Start time: 18:02:38 on Jun 25,2019 # vlog -reportprogress 300 -sv ../../../rtl/phy/altera_eth_10gbaser_phyaltera_xcvr_native_a10_180/sim/altera_xcvr_native_a10_functions_h.sv -work altera_common_sv_packages # -- Compiling package altera_xcvr_native_a10_functions_h # # Top level modules: # --none-- # End time: 18:02:38 on Jun 25,2019, Elapsed time: 0:00:00 # Errors: 0, Warnings: 0 # Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017 # Start time: 18:02:38 on Jun 25,2019 # vlog -reportprogress 300 -sv "+incdir+../models" ../models/tb_top.sv # -- Compiling package eth_register_map_params_pkg # -- Compiling package avalon_if_params_pkt # -- Compiling module avalon_bfm_wrapper # -- Importing package avalon_if_params_pkt # ** Error: ** while parsing file included at ../models/tb_top.sv(19) # ** at ../models/avalon_driver.sv(66): (vlog-13006) Could not find the package (avalon_mm_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line. # End time: 18:02:39 on Jun 25,2019, Elapsed time: 0:00:01 # Errors: 1, Warnings: 0 # ** Error: C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed. # Error in macro ./mentor.do line 25 # C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed. # while executing # "vlog -sv {+incdir+../models} "../models/tb_top.sv" " # ("eval" body line 1) # invoked from within # "eval $file" # ("foreach" body line 2) # invoked from within # "foreach file $design_files { # eval $file # }" # ("eval" body line 13) # invoked from within # "com"

 

 

What is your advice? regards, Pieter

AnandRaj_S_Intel
Employee
221 Views

Hi Pieter,

 

Please refer similar case which describes the solution.

https://forums.intel.com/s/question/0D70P000005tbf1SAA/how-to-use-avalonmm-master-bfm

 

Regards

Anand

 

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