Hi,
I try to simulate DDR2 HCP using Native interface. I set data rate in FULL rate and Memory burst length in 4. According to DDR and DDR2 SDRAM High-Performance Controller User Guide in page 4-40 that I can set local_size either 1 or 2 for each read or write request. First, I write a sequential data to DDR2. I read out those data in the same address sequentially by setting different local_size. But, the data output from DDR2 is incorrect:confused:. (as show in attach file) Did anyone get the same problem with me?? Please help me. Thanks.:) Best Regards, JS WangLink Copied
Hi,
Have you solve your problem ? I try to control DDR/DDR2 in full rate mode, using HCP2 local signals. I miss some information to understand well burst read and write operation. http://alteraforums.net/forum/showthread.php?t=30528 Thanks, SebastienFor more complete information about compiler optimizations, see our Optimization Notice.