onchip RAM resource usage

[Altera_Forum]

Hi all 

I'm using a cyclone III EP3C40 device which boasts 126 M9K blocks for over 1Mbit onchip RAM. I understand that 'real' memory bits are 8/9, so I have almost exactly 1Mbit. My former design used 618472 memory bits and fitter report correctly shows 53% RAM is used. So I increased the onchip RAM used in sopc builder, 8kbytes more: it should still fit in my device. But Quartus answer is not! When Quartus processes the design, it tells me it can't fit in the device because I'm using 102% of available memory. Why?

[Altera_Forum]

It depends how effeciently you are using the memory. each M9k holds 9kbits, and can only be used by 1 thing. If you have something in the design somewhere that doesnt use the memories to their max potential (like I suspenct you have) then you run into the situation you have.

[Altera_Forum]

Thank you for your answer, Tricky 

You are right. I explored the fitter report and found out:  Total memory bits: 618472 ot 1161216 (53%)  M9Ks: 122 of 127 (97%)  These are the ip modules using M9Ks in my design:  - Nios II/f with cache  - clock crossing bridge  - 4 onchip memory   - 2 tse mac  - 2 sgdma  - epcs and jtag controllers If I understand correctly what you said, even if Quartus reports a device utilizing only 40 memory bits, actually it requires a whole M9K block, then 8kbits !  I discovered tse and sgdma modules contain plenty of such devices. Can I overcome this situation?  I believe I once saw somewhere an option forcing synthesis of memory into registers rather than M9K but now I can't find it any more. Is this possible and safe?  Thank you Cris