FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

pcie interrupt

Altera_Forum
Honored Contributor I
819 Views

Hi, 

 

When there is an interrupter, I'm getting multiple PICe interrupts from Jungo driver until it gets the interrupt serviced. Does anyone know if PCIe Hard IP generates continuous interrupt TLP packets to PC when RxmIrq_i is asserted? Or does PCIe Hard IP generates only one interrupt TLP packet to PC? 

 

Thanks in advance. 

 

K.
0 Kudos
2 Replies
Altera_Forum
Honored Contributor I
84 Views

DId you find any solution for this? Any answer?

Altera_Forum
Honored Contributor I
84 Views

I think PCIe Hard IP generates only one interrupt TLP packet to PC. 

You are getting multiple PICe interrupts from Jungo driver until it gets the interrupt serviced, could it be from the previous interrupt which is not being serviced and cleared.
Reply