FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

pcie interrupt

Altera_Forum
Honored Contributor II
862 Views

Hi, 

 

When there is an interrupter, I'm getting multiple PICe interrupts from Jungo driver until it gets the interrupt serviced. Does anyone know if PCIe Hard IP generates continuous interrupt TLP packets to PC when RxmIrq_i is asserted? Or does PCIe Hard IP generates only one interrupt TLP packet to PC? 

 

Thanks in advance. 

 

K.
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2 Replies
Altera_Forum
Honored Contributor II
127 Views

DId you find any solution for this? Any answer?

Altera_Forum
Honored Contributor II
127 Views

I think PCIe Hard IP generates only one interrupt TLP packet to PC. 

You are getting multiple PICe interrupts from Jungo driver until it gets the interrupt serviced, could it be from the previous interrupt which is not being serviced and cleared.
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