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I connect pcie x4 and ddr2 control modual to nios.but when the generation finished, I found that there are so many port . the pcie x4 port what I needed just the : refclk,serdes in[3:0],serdes out[3:0].but there are other port like : gxb_powerdown_pcie,pipe_mode_pcie,rxdatak_ext_pcie,rxelecidle_pcie,and so on.Is that means that I must write some moduals to reset the pcie core or control and monitor it's working status .Is that true?Is there example code about the pcie of nios ii,thanks!
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hi, if i understand you right, you want to know how to connect the top entety ports of pcie and ddr-sdram. Maybe the attached file can help you. With these connections i successfully made a pcie design.
Good luck. herby
bdf_sample.JPG
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thank you so much
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hey there !!
do u also have pictures of ur sopc system, i´m wondering how to connect nios cpu, pci express and ddr2? thanks for help !!
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