signal compiler errors: not updating model changes properly?

[Altera_Forum]

Hi there,  

 I am working on a combined (both standard and advanced) blockset design which is simulating and compiling fine in signal compiler. I'm periodically running signal compiler after making changes and simulating.   In a given design, if I make a change (e.g. change the name of a subsystem from AB to AB_change), simulate, and then try to recompile, the compilation fails. The error message seems to indicate that there are two conflicting subsystems now: Error (10430): VHDL Primary Unit Declaration error at two_cordic_again_safe_path.vhd(5): primary unit "two_cordic_again_safe_path" already exists in library "work" File: F:/user/proj/matlab/simulink_test/hw_dest/two_cordic_again/AB_change/two_cordic_again_safe_path.vhd Line: 5 Error (10784): HDL error at two_cordic_again_safe_path.vhd(5): see declaration for object "two_cordic_again_safe_path" File: F:/user/proj/matlab/simulink_test/hw_dest/two_cordic_again/AB/two_cordic_again_safe_path.vhd Line: 5  So it seems that something is not properly updating its current knowledge of the model with this subsystem name change.   Noticing that the <projname>_add.tcl file now has an extra line still for the old name, I delete this line manually, and I also delete the directory in the hardware destination directory for the old subsystem. But something doesn't like my rash behavior -- signal compiler now gives the following error:  couldn't read file "../hw_dest/two_cordic_again/AB/AB.add.tcl": no such file or directory  while executing "source "$mdldir/hw_dest/two_cordic_again/AB/AB.add.tcl""  (file "../DSPBuilder_two_cordic_again_import/two_cordic_again_AB_entity_add.tcl" line 1)  invoked from within "source [file join $mdldir "DSPBuilder_two_cordic_again_import/two_cordic_again_AB_entity_add.tcl" ]"  (file "../two_cordic_again_add.tcl" line 16)  invoked from within "source "$model_addfile""  (file "C:\DOCUME~1\user\LOCALS~1\Temp\generateProject8042378375381520367.tcl" line 27)Error: Evaluation of Tcl script C:\DOCUME~1\user\LOCALS~1\Temp\generateProject8042378375381520367.tcl unsuccessful  I'm running matlab2009b, DSP Builder 9.1, Quartus II 9.1 on WindowsXP.   Is there some bug with the signal compiler not clearing something out? Is there a viable workaround (whether it involves deleting lines/directories/files or not)? Any help is much appreciated.   Thanks,  Dean