I would like to modify emif simulation model to use user refreshes as well. right now, even though i selected this option in the ip editor, i do not see it in the generated example design.
do you have a simulation design with user defined refreshes? if not, which files should I change to insert the refresh commands at regular intervals?
My goal to see how read/write operations are affected by user issued refresh commands.
External Memory Interfaces Intel®
Agilex™ FPGA IP User Guide
Updated for Intel® Quartus® Prime Design Suite: 21.4
IP Version: 2.6.0
The EMIF example design do not control the MMR interface to perform user refresh.
So user needs to add the user refresh control logic into the simulation to perform the user refresh.
Please refer to register in picture below to issue a user refresh request.
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