tripple speed ethernet system side connections the FPGA HPS processor

[FFAA]

how do i connect the and handle (the streaming )

the system side to an HPS in an FPGA design.. 

The current design has the Avalon MM interface connection but not streaming connections.

How do the HPS perform a Transmit/Receive request  to the IP core.

[Jeet14]

Hi,

Please do allow sometime to check if there is any reference design with Avalon Streaming Interface (HPS+TSE). I will update you soon.

Regards

Tiwari