Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Novice
84 Views

A pulse occurs during MAX 10 update while power is on

Hi,

While MAX10 FPGA is programmed during power on state I find a  low pulse(~ns) (occurs for each output pin.

Does anybody know how to fix this issue.

 

 

0 Kudos
1 Reply
Highlighted
Employee
55 Views

Hi JW1121,

 

Have you tried to set the unused pins to tri-stated in Quartus?

Please refer to the following picture (go to Assignment --> Device..)

Screenshot (300).png

 

Regards,

Matt

0 Kudos