FPGA, SoC, And CPLD Boards And Kits
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Arria® 10 SoC Development Kit LVDS SPEED of FMC IF

雅内藤001
Beginner
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How fast is the LVDS signals of the board through the FMC interfaces designed for? When I saw the Table 5-21 and 5-22 of UG-20004, I thought I can use many LVDS signals about 100 pairs for my daughter board design. But when I saw the patern of them on the artwork design, I've got that many signals listed on Table 5-21 and 5-22 were not designed for Zdiff controled. And more they are not pair routing too. So I want to know how fast can I use the LVDS lines. Has all the LVDS lines tested? If there is a person has tested all the LVDS lines, what speed did he do the test? 

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Rahul_S_Intel1
Employee
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There is no specification for the low and high speed data rates/frequency for LVDS.

 

The only information available is to find the from the page no:22 of the below link

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/a10_datasheet.pdf

 

 

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