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Altera_Forum
Honored Contributor I
1,389 Views

DE2: USB examples

Hello,  

I'm trying to figure out how to go about starting a USB device that blinks LEDs if told to do so by PC. 

Looking at the example, DE2_USB_API, I can see TONS of Verilog files for a Verilog project where most projects are done in VHDL. Not that big of a deal, I think I should be able to port it, but I'm not sure what peices I will need. I have been looking at the embedded programming guide and the datasheet, but I'm not sure what parts of the DE2 i need to be working with in order to blink 2 simple LEDs.  

 

For Example, these are all outputs and one inout: 

inout OTG_DATA; // ISP1362 Data bus 16 Bits output OTG_ADDR; // ISP1362 Address 2 Bits output OTG_CS_N; // ISP1362 Chip Select output OTG_RD_N; // ISP1362 Write output OTG_WR_N; // ISP1362 Read output OTG_RST_N; // ISP1362 Reset output OTG_FSPEED; // USB Full Speed, 0 = Enable, Z = Disable output OTG_LSPEED; // USB Low Speed, 0 = Enable, Z = Disable output OTG_INT0; // ISP1362 Interrupt 0 output OTG_INT1; // ISP1362 Interrupt 1 output OTG_DREQ0; // ISP1362 DMA Request 0 output OTG_DREQ1; // ISP1362 DMA Request 1 output OTG_DACK0_N; // ISP1362 DMA Acknowledge 0 output OTG_DACK1_N; // ISP1362 DMA Acknowledge 1 

 

are there no inputs? Page 10 of the programming guide reads: 

 

--- Quote Start ---  

The ISP1362 can be viewed as a complete set of USB functionality—host, device and OTG—that is accessible to the 

programmer through four I/O ports. Writing and reading register sets control the functionality, and writing and reading 

the respective buffers access the USB traffic. 

At the lowest level, the ISP1362 is accessed as four I/O ports. These are: 

• Device Controller command port 

• Device Controller data port 

• Host Controller command port 

• Host Controller data port. 

The OTG Controller shares the same I/O ports as the Host Controller. 

--- Quote End ---  

 

 

is there a reason why these ports are not listed in the .v file? What am I supposed to be writing an interface for on the hardware side? I have what seems to be a good looking tutorial for the software side, so I figured I should tackle the hardware first. 

Can someone please help? 

 

Thanks 

Malik 

 

-edit- 

Does this example use the J-TAG(USBLaster?) port and not the USB Device port??
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4 Replies
Altera_Forum
Honored Contributor I
81 Views

Hi Malik, 

 

there are inputs, its the inout [15:0] OTG_DATA ports. The output ports are used to drive and configure the ISP1362 chip on the board. The inout port is the data bus to that chip which allows you to read and write data from and to the chip. 

To use the USB ports you have to write a module that drives and configures the chip and handles writing and reading proceedures. 

 

Yes, the example program uses the USB-Blaster interface. 

 

 

Alex
Altera_Forum
Honored Contributor I
81 Views

Hello Spellic, 

I think I'm going to try and write a USB device interface. Although I've decided that I'm far from there, I have been printing sections of the ISP1362 datasheet. But I don't even think that datasheet does a good job of telling me how it works and how I talk to it. And the programming manual is for the software side of things. 

 

If i can get libUSB to behave on my computer, it might not be much of a problem on the software side, at least not while I'm debugging the most basics of device communication, but it looks like it's going to be hard to get that far, as there's little guidance online, and most of the people that I know that would know anything about it, just tell me to stay away from it or use an FTDI USB to COM interface. 

 

Malik
Altera_Forum
Honored Contributor I
81 Views

Hello Malik, 

 

I can not disagree with those people. Its gonna be though to write such a controller. 

 

edit: 

 

Ok, it turns out that it will not work like I had expected. The design I refer to is acting as a USB chip itself that can be configured to run as an host or slave device. It will acquire much more space on the FPGA and the pins on the output side need to be hooked up to a USB socket or port directly. 

In addition it would be required to write a control module to handle that design, which is similar to writing a controller module to handle the USB chip that is on the DE2 board already. 

 

i would really need such a controller myself, ;-) but instead of writing my own controller i am currently looking at an available solution from opencores.org (usb 1.1 host and function ip core (http://opencores.org/project,usbhostslave)). 

 

it has a wishbone interface, which makes it a bit easier to use. but the problem now is to figure out, how to connect the pins from the usb chip on the board to the module. 

and if this can be done without modifying the core. 

 

i just started reading the documentation and can't tell if it works at all nor if i have the time to finish the project. but in my opinion it is the best way to make use of the usb interface without including the nios ii stuff. 

 

Spellic
Altera_Forum
Honored Contributor I
81 Views

Aww, I was excited for a second, but if an actual core to be used as a USB chip can be made, could a controller be that much harder? Well, I guess I'll find out. I just can't believe that it's so difficult. I mean, it's almost documented in such a way that you need to have knowledge of some esoteric engineering techniques to even attempt it. 

 

Ok, maybe that's an exageration, but the datasheet really does beat around the bush, A LOT!! 

 

Malik
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