MAX10 IO characteristics while not powered

[tanabeh]

I designed the system with MAX10 FPGA and mcu (ESP32).

MAX10 is power supplied from the DC-DC 3.3V converter (named VCC3V3-SW) which is ON/OFF controlled by mcu. Mcu controls MAX10 through I2C bus pulled up by mcu's 3.3V (named VCC3V3).

In standby mode, VCC3V3-SW for the FPGA is not powered, VCC3V3 is on.

In this mode, I2C bus signal level at the UOpin of MAX10 will be  down to around 1V. When both VCC3V3 and VCC3V3-SW are powered, I2C bus are pulled up correctly up to 3.3V.

The question is, want to know the reason why IO pins which externally pulled up show 1V when FPFA is not powered.

I guess ESD protection diodes in the IO block will cause reverse current path from the external pull up resister, am I correct ?

In my previous design, I inserted I2C bus buffer for isolation of bus power lines, but now I had to give up buffers due to space.

Do I have to back to previous design ?

Regards,

H.Dekker Tanabe

[EthanLi]

Hi Tanabeh​,

The 1V with IO pin should be a weak pull up in MAX 10.

If there is no power supply to the Max 10, there would be no volatage at all.

Could you please check if the DC-DC converter output voltage is really down to zero?

I suspect there is still output voltage from converter even in standby mode.

Thanks,

Ethan

[tanabeh · Accepted solution]

Thanks for replying, now I found the root cause and solution.

The reason of leakage was due to wrong pin assignment to the ADC capable port.

With changing assignment to GPIO single function port could solve leak current.

https://www.intel.com/content/www/us/en/docs/programmable/683794/current/i-o-pin-leakage-current.html

Thanks