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Hi.
Internal weak pull-up resistors interfere with my scheme. As far as I know the pull-up resistors cannot be disconnected during power up and configuration. May I not supply voltage to VCCIO?
How long may I not supply voltage to VCCIO? I configure FPGA using my computer.
Best regards,
dinam
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I use Cyclone V - 5CEFA2F23C8.

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