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I've created the design based on this document but it is not working
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Hello.
I would check the following items:
1- Make sure Nios II reset vector and exception vector are both pointing to QSPI
2- Make sure you use 25MHZ clock as maximum to the QSPI IP.
3- Try to use PLL for your system clocking. One clock would be for the system.
Please let me know if any of the debug steps would help.
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Hello.
I would check the following items:
1- Make sure Nios II reset vector and exception vector are both pointing to QSPI
2- Make sure you use 25MHZ clock as maximum to the QSPI IP.
3- Try to use PLL for your system clocking. One clock would be for the system.
Please let me know if any of the debug steps would help.
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I was using external clock for the Qspi block once I used the PLL it is working now.
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