Observe core fpga power over oscilloscope.

[Altera_Forum]

I am using the Altera Cyclone III Development kit. I have to observe the supply voltage to the Cyclone III Fpga. 

 I read that I can observe FPGA Core Power using the JP6 pin on the board. But apparently JP6 is powered through the USB. If I disconnect the USB, with the 12V power adapter still connected, the voltage on JP6 goes down to 0. I could observe the voltage through JP6, with it being powered by the USB, its just that the USBBlaster is adding an unwanted clock.....  - Can I disconnect the USB and observe power on JP6? - Is there any other pin where I can observe the supply voltage to the FPGA using a scope?  Once I program the board, I do not need to connect it to the USB. I am not using Signal Tap or any other interface which would require me to keep the usb cable connected....  Suggestions. Comments?  Thank you, ~Evenstar.

[Altera_Forum]

I am not sure why you are having an issue. 

 When I look at the schematic I have for the board, it looks like JP6 is inline with the output of the regulator (supplied from the 12 volt input).  Just looking at either end of the JP6 (still connected and ground will show you the voltage used).  If you remove the JP6 jumper and insert an Amp meter inline with the JP6 pins, you should be able to see the current needed by the FPGA core.  All this should have no relationship to the USB connection.  Avatar