PCIe Example Design for Arrow EAGLE Board

[Maxime_Kanawasaki]

Hello !!

I'm using Arrow Agilex-5 EAGLE Board with Device A5ED065BB32AE4SR0 with Q25.1

I've generated IP Core Example Design for Development Kit selected NONE. 

GTS AXI Streaming Intel FPGA IP for PCI Express

Then, I've compiled the Example Design and then modified the pins to match the Agilex-5 EAGLE Board schematics.

There are several problems:

- input p0_pin_perst_n_i_reset_n assigned to PIN_CF132 which is PCIE_RTSb

- input p0_pin_perst_n_1_i_reset_n I've tried to assign to many different pins which were reasonable to connect, but was getting error during the Fitting stage. The only pin assignment which passing compilation is suggested by tool: PIN_BU109 which is according to schematics CX_SMB_SDA

- input refclk_clk I had to connect to PIN_A23 which is FPGA_25M_CLK and thus I had to change IO PLL Reference Clock to 25MHz instead of default 100MHz

After design was successfully compiled, it was programmed to Agilex-5 FPGA and connected to PC running Ubuntu 24.04.2 LTS. Then, I've tried to list PCIe devices with command lspci and I never got Altera Agilex-5 device recognized between PCIe devices. 

So, now, I'm not sure, if the problem with pin assignment or something else.

Does anyone tried PCIe IP for EAGLE Board or probably someone can assist???

Thanks in advice!!!

[jc_ddc]

I am experiencing the same issue. I was able to simulate the design example using Questa, but was unable to run in on hardware.

I ran into issues mapping the two reset pins. There is no indication on which pin "p0_pin_perst_n_1_i_reset_n" needs to be connected to. 

I believe you're correct in changing the IO PLL Reference Clock to 25 MHz since this is what the Eagle board provides. 

[ventt]

Hi @Maxime_Kanawasaki,

Thanks for reaching out.

Allow me some time to investigate your issue. I shall come back to you with the findings.

Have you tried to bring up the PCIe link on the Agilex-5 EAGLE Board using the older version of Quartus before?

Thanks.

Best Regards,

Ven

[ventt]

Hi @Maxime_Kanawasaki,

We do not have the pin assignment information for the Arrow Eagle board.

Could you please reach out to the local Arrow DFAE to get support on the official pin assignment information for the Arrow Eagle board?

Once you have confirmed the correct pin assignments, we are pleased to assist if you still encounter the PCIe link issue when using the PIO Design Example.

Thanks.

Best Regards,

Ven

[ventt]

Hi @Maxime_Kanawasaki,

May I know if you have any updates?

Thanks.

Best Regards,

Ven

[ventt]

Hi @Maxime_Kanawasaki,

We have not received a response from you regarding our previous reply. Please log in to ‘https://supporttickets.intel.com’, view details of the desired request, and post a feed/response within the next 15 days to allow me to continue to support you.

After 15 days, this thread will be transitioned to community support.

Community users will be able to assist you with your follow-up questions.

Thanks.

Best Regards,

Ven