FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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PCIe issue with the Cyclone IV devkit

Honored Contributor II

I am having issues with the Cyclone IV devkit and its PCIe hard IP block. My FPGA image behaves differently according to the PCIe slot I use with my Dell T3600. 


It seems that the PCIe training fails on certain slots. I have tried the values 40'h88 and 40'ha8 for test_in. The LTSSM register sometimes gets stuck on the value 0 or the value 3, and doesn't get recognised by the computer. 


What steps should I take to further debug the issue?
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