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Packed structure access for ARM DS and Linaro on Intel SoC not generating correct assembly


I am using a DE1-SoC board with the latest Intel suggested ARM DS toolchain on Windows 10.

Structures 'mid' and 'inner' must be contiguous in memory. (the size of 'inner' must be 7)

The constant assignment to 'po->o4.m4.i1' works. If a function return value is assigned to 'po->o4.m4.i1', an exception is generated since 'i1' is not aligned on a 4 byte address.

Do I specify the packing of the structures wrong?

(The code works on a normal Atmel Cortex m0 development kit)

#pragma pack(1)
typedef struct inner
uint32_t i1;
uint16_t i2;
uint8_t i4;
} inner;
#pragma pack()

#pragma pack(1)
typedef struct mid
uint32_t m1;
uint8_t m3;
inner m4;
} mid;
#pragma pack()
typedef struct outer
uint32_t o1;
uint8_t o3;
mid o4;
} outer;
uint32_t tt( uint32_t v)
return v * 2;
int main( int argc, char** argv )

outer o;
outer * po;
po = &o;

po->o4.m4.i4 = sizeof(inner);
po->o4.m4.i1 = 0x1234;
po->o4.m4.i1 = tt( 0x1234 );
po->o4.m1 = tt( 0x1234 );


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May be you need to check if your tt(0x1234) call return one word data.

Do you have any log?

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