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Novice
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Quartus prime pro 19.1 always crashes on my project using arria 10 FPGA.

Quartus prime pro 19.1 always crashes on my project using arria 10 FPGA.

Quartus 13.1 on Stratix 3 FPGA has no problem with the same project (aside specific PLL/RAM/ROM,IO BUFFERS components).

See attached crash message.

Entry is a vqm from synplify pro 2019.09 (same for stratix 3 project).

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Novice
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When I change some synthesis option, Quartus 19.1 goes further but crashes with another error,

see second attachment.

 

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Hi, can you share your design that can duplicate this error?

What are the change made in the synthesis option that crashes with the second error?

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Moderator
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Also, how much RAM does the computer you are using for compilation have?

 

You may also want to try trashing the qdb folder in your project directory before compiling to make sure there is no corruption from a prior compilation.

 

#iwork4intel

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Plenty of RAM:

 

Removing qdb does not help.

I will have quartus 19.3 installed soon, let's see how it goes.

 

Your job looked like:

 

------------------------------------------------------------

# LSBATCH: User input

quartus Achilles_arria_X.qpf

------------------------------------------------------------

 

Successfully completed.

 

Resource usage summary:

 

   CPU time :                                  3958.68 sec.

   Max Memory :                                10099 MB

   Average Memory :                            3414.17 MB

   Total Requested Memory :                    48000.00 MB

   Delta Memory :                              37901.00 MB

   Max Swap :                                  -

   Max Processes :                             15

   Max Threads :                               175

   Run time :                                  21003 sec.

   Turnaround time :                           21004 sec.

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No, I cannot share it.

Below the options I changed, not sure which one affects the run:

 

set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF

set_global_assignment -name FRACTAL_SYNTHESIS OFF

set_global_assignment -name MUX_RESTRUCTURE OFF

set_global_assignment -name INFER_RAMS_FROM_RAW_LOGIC OFF

set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED

set_global_assignment -name AUTO_ROM_RECOGNITION OFF

set_global_assignment -name AUTO_RAM_RECOGNITION OFF

set_global_assignment -name AUTO_DSP_RECOGNITION OFF

set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION OFF

set_global_assignment -name AUTO_CLOCK_ENABLE_RECOGNITION OFF

set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS OFF

set_global_assignment -name HDL_MESSAGE_LEVEL LEVEL3

set_global_assignment -name BLOCK_DESIGN_NAMING QUARTUSII

set_global_assignment -name SYNTH_MESSAGE_LEVEL HIGH

set_global_assignment -name ALLOW_REGISTER_MERGING OFF

set_global_assignment -name ALLOW_REGISTER_DUPLICATION OFF

set_global_assignment -name BLOCK_RAM_TO_MLAB_CELL_CONVERSION OFF

set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING OFF

set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION NEVER

set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION NEVER

set_global_assignment -name QII_AUTO_PACKED_REGISTERS OFF

set_global_assignment -name AUTO_DELAY_CHAINS OFF

set_global_assignment -name FITTER_EFFORT "STANDARD FIT"

set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION OFF

set_global_assignment -name ROUTER_REGISTER_DUPLICATION OFF

set_global_assignment -name DSP_BLOCK_BALANCING OFF

set_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS ON

 

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Novice
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Quartus 19.3 also crashes.

Error example below:

Problem Details

Error:

Internal Error: Sub-system: FTI, File: /quartus/h/fti_utils_sys.h, Line: 93

a.is_valid() && b.is_valid()

Stack Trace:

  0xa1523: (tsm_fti)

  0xb029d: void FTI_SUBDOMAIN_CLOCK_DELAYS::compute_delays<(FTI_NETLIST_MODE)0>(FTI_NETLIST<(FTI_NETLIST_MODE)0> const&, FTI_SUBDOMAIN_VIEW const&, FTI_LPSP_TYPE, FTI_NODE_CLOCK_DELAY_CACHE const&)::{lambda(tbb::blocked_range<QTL_TRANSFORM_RANDOM_ACCESS_ITER<FTI_SUBDOMAIN_VIEW::get_range_entries_in_subdomain() const::TRANSFORM, __gnu_cxx::__normal_iterator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> const*, std::vector<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int>, std::allocator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> > > >, FTI_SUBDOMAIN_EDGE_ENTRY_VIEW> > const&)#1}::operator()(tbb::blocked_range<QTL_TRANSFORM_RANDOM_ACCESS_ITER<FTI_SUBDOMAIN_VIEW::get_range_entries_in_subdomain() const::TRANSFORM, __gnu_cxx::__normal_iterator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> const*, std::vector<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int>, std::allocator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> > > >, FTI_SUBDOMAIN_EDGE_ENTRY_VIEW> > const&) const + 0x38d (tsm_fti)

  0xb0854: tbb::interface9::internal::start_for<tbb::blocked_range<QTL_TRANSFORM_RANDOM_ACCESS_ITER<FTI_SUBDOMAIN_VIEW::get_range_entries_in_subdomain() const::TRANSFORM, __gnu_cxx::__normal_iterator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> const*, std::vector<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int>, std::allocator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> > > >, FTI_SUBDOMAIN_EDGE_ENTRY_VIEW> >, void FTI_SUBDOMAIN_CLOCK_DELAYS::compute_delays<(FTI_NETLIST_MODE)0>(FTI_NETLIST<(FTI_NETLIST_MODE)0> const&, FTI_SUBDOMAIN_VIEW const&, FTI_LPSP_TYPE, FTI_NODE_CLOCK_DELAY_CACHE const&)::{lambda(tbb::blocked_range<QTL_TRANSFORM_RANDOM_ACCESS_ITER<FTI_SUBDOMAIN_VIEW::get_range_entries_in_subdomain() const::TRANSFORM, __gnu_cxx::__normal_iterator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> const*, std::vector<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int>, std::allocator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> > > >, FTI_SUBDOMAIN_EDGE_ENTRY_VIEW> > const&)#1}, tbb::static_partitioner const>::execute() + 0x1d4 (tsm_fti)

  0x27156: tbb::internal::custom_scheduler<tbb::internal::IntelSchedulerTraits>::local_wait_for_all(tbb::task&, tbb::task*) + 0x536 (tbb)

  0x1fd58: tbb::internal::arena::process(tbb::internal::generic_scheduler&) + 0x1e8 (tbb)

  0x1e84b: tbb::internal::market::process(rml::job&) + 0x1b (tbb)

  0x1aac5: tbb::internal::rml::private_worker::run() + 0x65 (tbb)

  0x1ad09: tbb::internal::rml::private_worker::thread_routine(void*) + 0x9 (tbb)

   0x7aa1: (pthread)

  0xe8bcd: clone + 0x6d (c)

 

End-trace

 

 

Executable: quartus_fit

Comment:

None

 

System Information

Platform: linux64

OS name: Red Hat

OS version: 6

 

Quartus Prime Information

Address bits: 64

Version: 19.3.0

Build: 222

Edition: Pro Edition

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I understand that you can not share your design due to confidential.

If possible, could you create a simplified design that can duplicate the same error? Our engineering team need a design in order to do any further debug.

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Novice
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Quartus 19.3 also crashes when I use Quartus synthesis (no vqm from synplify pro):

Problem Details

Error:

Internal Error: Sub-system: FTI, File: /quartus/h/fti_utils_sys.h, Line: 93

a.is_valid() && b.is_valid()

Stack Trace:

  0xa1523: (tsm_fti)

  0xb029d: void FTI_SUBDOMAIN_CLOCK_DELAYS::compute_delays<(FTI_NETLIST_MODE)0>(FTI_NETLIST<(FTI_NETLIST_MODE)0> const&, FTI_SUBDOMAIN_VIEW const&, FTI_LPSP_TYPE, FTI_NODE_CLOCK_DELAY_CACHE const&)::{lambda(tbb::blocked_range<QTL_TRANSFORM_RANDOM_ACCESS_ITER<FTI_SUBDOMAIN_VIEW::get_range_entries_in_subdomain() const::TRANSFORM, __gnu_cxx::__normal_iterator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> const*, std::vector<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int>, std::allocator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> > > >, FTI_SUBDOMAIN_EDGE_ENTRY_VIEW> > const&)#1}::operator()(tbb::blocked_range<QTL_TRANSFORM_RANDOM_ACCESS_ITER<FTI_SUBDOMAIN_VIEW::get_range_entries_in_subdomain() const::TRANSFORM, __gnu_cxx::__normal_iterator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> const*, std::vector<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int>, std::allocator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> > > >, FTI_SUBDOMAIN_EDGE_ENTRY_VIEW> > const&) const + 0x38d (tsm_fti)

  0xb0854: tbb::interface9::internal::start_for<tbb::blocked_range<QTL_TRANSFORM_RANDOM_ACCESS_ITER<FTI_SUBDOMAIN_VIEW::get_range_entries_in_subdomain() const::TRANSFORM, __gnu_cxx::__normal_iterator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> const*, std::vector<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int>, std::allocator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> > > >, FTI_SUBDOMAIN_EDGE_ENTRY_VIEW> >, void FTI_SUBDOMAIN_CLOCK_DELAYS::compute_delays<(FTI_NETLIST_MODE)0>(FTI_NETLIST<(FTI_NETLIST_MODE)0> const&, FTI_SUBDOMAIN_VIEW const&, FTI_LPSP_TYPE, FTI_NODE_CLOCK_DELAY_CACHE const&)::{lambda(tbb::blocked_range<QTL_TRANSFORM_RANDOM_ACCESS_ITER<FTI_SUBDOMAIN_VIEW::get_range_entries_in_subdomain() const::TRANSFORM, __gnu_cxx::__normal_iterator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> const*, std::vector<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int>, std::allocator<FTI_STRONG_ID<FTI_EDGE_ID_TAG, unsigned int> > > >, FTI_SUBDOMAIN_EDGE_ENTRY_VIEW> > const&)#1}, tbb::static_partitioner const>::execute() + 0x1d4 (tsm_fti)

  0x27156: tbb::internal::custom_scheduler<tbb::internal::IntelSchedulerTraits>::local_wait_for_all(tbb::task&, tbb::task*) + 0x536 (tbb)

  0x23b00: tbb::internal::generic_scheduler::local_spawn_root_and_wait(tbb::task*, tbb::task*&) + 0xa0 (tbb)

  0xa4033: std::pair<FTI_STRONG_VEC<std::vector<FTI_GB_SUBDOMAIN_INFO, std::allocator<FTI_GB_SUBDOMAIN_INFO> >, FTI_STRONG_ID<FTI_SUBDOMAIN_ID_TAG, unsigned int> >, bool> (anonymous namespace)::compute_all_subdomain_info<(FTI_NETLIST_MODE)0>(FTI_TIMING_RESULTS const&, FTI_NETLIST<(FTI_NETLIST_MODE)0> const&, FTI_LPSP_TYPE, FTI_CORNER_TYPE, FTI_SLACK_GUARDBAND_PARAMS const&, FTI_GB_SCALING_FACTORS const&, bool)::{lambda(tbb::blocked_range<FTI_STRONG_ID<FTI_SUBDOMAIN_ID_TAG, unsigned int> > const&)#1}::operator()(tbb::blocked_range<FTI_STRONG_ID<FTI_SUBDOMAIN_ID_TAG, unsigned int> > const&) const + 0xb63 (tsm_fti)

  0xa458d: tbb::interface9::internal::start_for<tbb::blocked_range<FTI_STRONG_ID<FTI_SUBDOMAIN_ID_TAG, unsigned int> >, std::pair<FTI_STRONG_VEC<std::vector<FTI_GB_SUBDOMAIN_INFO, std::allocator<FTI_GB_SUBDOMAIN_INFO> >, FTI_STRONG_ID<FTI_SUBDOMAIN_ID_TAG, unsigned int> >, bool> (anonymous namespace)::compute_all_subdomain_info<(FTI_NETLIST_MODE)0>(FTI_TIMING_RESULTS const&, FTI_NETLIST<(FTI_NETLIST_MODE)0> const&, FTI_LPSP_TYPE, FTI_CORNER_TYPE, FTI_SLACK_GUARDBAND_PARAMS const&, FTI_GB_SCALING_FACTORS const&, bool)::{lambda(tbb::blocked_range<FTI_STRONG_ID<FTI_SUBDOMAIN_ID_TAG, unsigned int> > const&)#1}, tbb::auto_partitioner const>::execute() + 0x1ad (tsm_fti)

  0x27156: tbb::internal::custom_scheduler<tbb::internal::IntelSchedulerTraits>::local_wait_for_all(tbb::task&, tbb::task*) + 0x536 (tbb)

  0x1fd58: tbb::internal::arena::process(tbb::internal::generic_scheduler&) + 0x1e8 (tbb)

  0x1e84b: tbb::internal::market::process(rml::job&) + 0x1b (tbb)

  0x1aac5: tbb::internal::rml::private_worker::run() + 0x65 (tbb)

  0x1ad09: tbb::internal::rml::private_worker::thread_routine(void*) + 0x9 (tbb)

   0x7aa1: (pthread)

  0xe893d: clone + 0x6d (c)

 

End-trace

 

 

Executable: quartus

Comment:

None

 

System Information

Platform: linux64

OS name: Red Hat

OS version: 6

 

Quartus Prime Information

Address bits: 64

Version: 19.3.0

Build: 222

Edition: Pro Edition

 

Attaching the constrain file in case that helps figuring out the issue (it is the arriaX if checks).

 

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Novice
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set current_project Achilles_arria_X

set is_a_synplify_project 0

set is_a_quartus_project 1

 

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Novice
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Quartus pro 19.3 ran ok for 6 hours till the end when I removed the complete constraint file

(I did that because the crash message was pointing to that).

So Quartus has some issue with the SDC.

I will have have to check which one makes it crash.

If you have any suggestion, tell me.

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Those constraints below makes quartus 19.3 arria x to crash (quartus 13.1 stratix 3 is ok with):

 

set max_input_delay 9

set max_output_delay 23

 

set_max_delay -from [get_ports *] $max_input_delay

set_max_delay -to  [get_ports *] $max_output_delay

 

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  set min_input_delay 0

  set min_output_delay 0

 

  set_min_delay -to  [get_ports *] $min_output_delay

 

Also makes it crash at the end of the fitter (max delay was making it crash at the end of synthesis).

Removing it too.

 

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The fractal synthesis also crashes quartus 19.3 synthesis when it uses a vqm from Synplify pro:

 

 

Problem Details

Error:

Internal Error: Sub-system: OPT, File: /quartus/synth/opt/opt_carry_pack.cpp, Line: 956

opt_can_convert_a10_arith_gate_to_shared_mode(sgate)

Stack Trace:

  0xf6b3d: opt_convert_a10_gate_with_no_sumout(CDB_SGATE_NODE*) + 0x49 (synth_opt)

  0xf7688: OPT_CARRY_PACK::prepare_chain(CDB_SGATE_NETLIST*, OPT_CHAIN&, bool) + 0x732 (synth_opt)

  0xf5957: OPT_CARRY_PACK::apply_packing_solution(CDB_SGATE_NETLIST*, std::vector<OPT_BIN, std::allocator<OPT_BIN> >&) + 0x5d (synth_opt)

  0xf4d6f: OPT_CARRY_PACK::pack_carry_chains(CDB_SGATE_NETLIST*) [clone .cold.248] + 0x739 (synth_opt)

  0x201d22: opt_run_carry_chain_packer(CMP_FACADE*, CDB_SGATE_NETLIST*) + 0x32 (synth_opt)

  0x4ef41: FTM_ROOT_IMPL::postprocess() + 0x81 (synth_ftm)

  0x52ac8: FTM_ROOT_IMPL::start_normal_flow() + 0x2078 (synth_ftm)

  0x5466b: FTM_ROOT_IMPL::start() + 0x4b (synth_ftm)

  0x54a02: FTM_ROOT::start(CDB_SGATE_NETLIST*, SCL_WYSIWYG_ATOM_FACTORY*) + 0x92 (synth_ftm)

  0x68c61: SCL_SYN_HIER::do_tech_mapping(CDB_SGATE_NETLIST*) + 0x305 (synth_scl)

  0x2a9c3: scl_run_ftm(CMP_FACADE*, SAM_FACADE*, CDB_SGATE_HIERARCHY*, CDB_SGATE_NETLIST*) + 0x8f (synth_scl)

  0x122f0d: SYNTH::QIS::SYNTHESIS_FLOW::ftm() + 0x39 (synth_qis)

  0x12882a: SYNTH::QIS::SYNTHESIS_FLOW::run_current_phase() + 0x21e (synth_qis)

  0x128d1f: SYNTH::QIS::SYNTHESIS_FLOW::run_full_flow(std::string const&, bool) + 0x361 (synth_qis)

  0x952c0: QIS_RTL_STAGE::IMPL::synthesize(QHD_PARTITION&, bool) + 0x322 (synth_qis)

  0x9550f: QIS_RTL_STAGE::synthesize(QHD_PARTITION&, bool) + 0xf (synth_qis)

  0x59bf9: qis_synthesize + 0x1cd (synth_qis)

  0x4c942: TclNRRunCallbacks + 0x42 (tcl8.6)

  0x4de7b: TclEvalEx + 0x68b (tcl8.6)

  0xf3f0e: Tcl_FSEvalFileEx + 0x25e (tcl8.6)

  0xf3ffe: Tcl_EvalFile + 0x2e (tcl8.6)

  0x14916: qexe_evaluate_tcl_script(std::string const&) + 0x44c (comp_qexe)

  0x19a1c: qexe_do_tcl(QEXE_FRAMEWORK*, std::string const&, std::string const&, std::list<std::string, std::allocator<std::string> > const&, bool, bool) + 0x417 (comp_qexe)

  0x1a9d5: qexe_run_tcl_option(QEXE_FRAMEWORK*, char const*, std::list<std::string, std::allocator<std::string> >*, bool) + 0x558 (comp_qexe)

  0x3922e: QCU::DETAIL::intialise_qhd_and_run_qexe(QCU_FRAMEWORK&, FIO_PATH const&, std::string const&, std::string const&, char const*, std::list<std::string, std::allocator<std::string> >*, bool) + 0xed (comp_qcu)

  0x41d1c: qcu_run_tcl_option(QCU_FRAMEWORK*, char const*, std::list<std::string, std::allocator<std::string> >*, bool) + 0x259 (comp_qcu)

  0x405bb7: qsyn2_tcl_process_default_flow_option(ACF_VARIABLE_TYPE_ENUM, char const*) + 0x9d (quartus_syn)

  0x1d69e: qexe_standard_main(QEXE_FRAMEWORK*, QEXE_OPTION_DEFINITION const**, int, char const**) + 0x6a0 (comp_qexe)

  0x40571b: qsyn2_main(int, char const**) + 0x14b (quartus_syn)

  0x3ef00: msg_main_thread(void*) + 0x10 (ccl_msg)

  0x41114: msg_thread_wrapper(void* (*)(void*), void*) + 0x6e (ccl_msg)

  0x11f0c: mem_thread_wrapper(void* (*)(void*), void*) + 0x5c (ccl_mem)

   0xc728: err_thread_wrapper(void* (*)(void*), void*) + 0x27 (ccl_err)

   0x6d85: thr_thread_wrapper + 0x15 (ccl_thr)

  0x41c90: msg_exe_main(int, char const**, int (*)(int, char const**)) + 0x148 (ccl_msg)

  0x405da0: main + 0x26 (quartus_syn)

  0x1ed1d: __libc_start_main + 0xfd (c)

  0x4054f9: (quartus_syn)

 

End-trace

 

 

Executable: quartus

Comment:

None

 

System Information

Platform: linux64

OS name: Red Hat

OS version: 6

 

Quartus Prime Information

Address bits: 64

Version: 19.3.0

Build: 222

Edition: Pro Edition

 

 

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Update: It is important to define the IO delay at the end of the sdc file,

because quartus does not know yet the clock definition when get_clocks * is used at the top.

 

I moved them at the bottom and I don't use get_clocks * anymore,

I define each pin with respective clock, using -add_delay when necessary (multiple clock domain per pin)..

 

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