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MFogl
Beginner
1,042 Views

Using ADC feature and JTAG @ 3.3V

Dear Sirs,

 

I have a project using a Max 10 device (10M08DAF256) and I wish to use the ADC feature and I have the JTAG interface at 3.3V (the Max device will be in a programming chain), so the VCCIO1B should be at 3.3V.

 

In some document I read this statements: 

 

a) If you do not enable the ADC feature, you may

connect VCCIO1A and VCCIO1B pins to different

voltage levels, provided that the VREF pin is not

used. If the VREF pin is used, you must connect

the VCCIO1A and VCCIO1B pins to the same

voltage level;

 

b) If you enable the ADC feature, connect

VCCIO1A and VCCIO1B to 2.5-V.

 

 

From the statement b), I deduct I can't use the ADC feature and JTAG at 3.3V; from the statement a) instead I infer I can connect VCCIO1A at 2.5V and VCCIO1B at 3.3V.

 

The question is: it is possible to use the ADC feature and JTAG @ 3.3V if I set  the VCCIO1A at 2.5V and VCCIO1B at 3.3V?

Further,: the VREF pin mentioned in the statement a) is the VREF for voltege referenced IO, or is the ADC Vref?

 

Thank you very much in advance.

 

Marco

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1 Reply
Rahul_S_Intel1
Employee
34 Views

Hi Macro,

The below is for line page no:14

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-10/pcg-01018.pdf

 

If you enable the ADC feature, connect

VCCIO1A and VCCIO1B to 2.5-V.

 

>>Yes

 

The VCCIO1B have to be power up with 2.5V if ADC is been enabled and JTAG pin have to supply have to be with compactable supply.

 

Regards,

Rs

 

Page no: 21 onwards use cases are shown

 

 

b) If you enable the ADC feature, connect

VCCIO1A and VCCIO1B to 2.5-V.

 

and