May I know, which configuration (JTAG Configuration or Internal Configuration) are you doing?
Have you checked the board settings as per device handbook?
Please refer the FPGA Configuration Troubleshooter,
especially link below,
Have you gone through the my previous post? especially configuration issue link?
please do visual check of board especially pins, rather clean it properly, monitor configuration signal voltage levels using standard oscilloscope & try to check implementation of simple D flip flop using JTAG Configuration on same board.