how to configure Cyclone10 input clk and PLL

[ZhiqiangLiang]

Hi,

The model I am using is Cyclone10LP 10CL120.

how to instantiate PLL by verilog code way?

how to instantiate PLL by block design way in quartus?

[KennyTan_Altera]

You may first instantiate the PLL in the IP catalog, then click on show instantiate template.

You may refer to https://www.intel.com/content/www/us/en/docs/programmable/683463/22-1/ip-catalog-and-parameter-editor.html

[KennyTan_Altera]

Is there any further question?

[ZhiqiangLiang]

@KennyTan_Altera 

Thank you very much!

 For the topic, I don't have more questions.

I am asking PLL and other questions in another thread:

https://community.intel.com/t5/Nios-V-II-Embedded-Design-Suite/Configure-NIOS-firmware-burning-interface/m-p/1686934/emcs_t/S2h8ZW1haWx8dG9waWNfc3Vic2NyaXB0aW9ufE1BNUlEQ01MQlNRSk1VfDE2ODY5MzR8U1VCU0NSSVBUSU9OU3xoSw 

[KennyTan_Altera]

Great to hear that, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.