Arria 10 clock buffer placement

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Arria 10 clock buffer placement


This wiki page is dedicated towards users that are struggling to assign clock buffers to specific locations. Clock buffers are often placed into CLKCTRL. CLKCTRL_G* indicates a global clock buffer is being used. CLKTRL_R* indicates a regional clock buffer is being used. Placement constraints can very depending on the device family used.

In families previous to Arria 10, we advise setting clock buffer locations as follows:

However, the same approach to leverage this information for Arria 10 is confusing and hard to find on the web and in documentation.


To constrain the output clock from an IOPLL to a specific clock buffer location in Arria 10, use the following qsf assignment:

set_location_assignment <location> -to <path to IOPLL output clock CLKENA0>

For example, to assign outclk0 of an Arria 10 IOPLL to a periphery clock:

set_location_assignment CLKCTRL_2K_P1_I7 -to "top:top_inst|my_arria_10_pll_altera_iopll_171_whjdkky:iopll_0|altera_iopll:altera_iopll_i|twentynm_iopll_ip:twentynm_pll|outclk[0]~CLKENA0"


You can use the Quartus GUI to make the assignment in the assignment editor. Using the assignment editor will make it easier to verify the path and available options fo CLKCTRL locations.



Version history
Last update:
‎06-26-2020 09:11 AM
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