Success! Subscription added.
Success! Subscription removed.
Sorry, you must verify to complete this action. Please click the verification link in your email. You may re-send via your profile.
BeMicro CV A9 (Cyclone V) FPGA Evaluation Kit
The BeMicro CV A9 is an enhanced BeMicro CV development board that utilizes Altera’s 28-nm low-cost Cyclone V FPGA. It retains all the main features of the original BeMicro CV predecessor while providing a higher logic density and additional features. The 5CEFA9F23C8N on the BeMicro CV A9 includes a hardened memory controller (HMC) connected to a single 16-bit wide, 1Gb DDR3 SDRAM device. FPGA user I/O are routed to the two 40-pin I/O headers and 80-pin MEC-style edge connector. The BeMicro CV A9 also includes an on board USB Blaster programmer, Micro-SD card slot, and a 10/100/1000 Ethernet PHY.
CV A9 Block Diagram
The BeMicro CV A9 board features the following major component blocks:
It is recommended to add an heatsink of 23x23mm due to heat generated by FPGA.
Part Number for MEC connector: MEC6-140-02-L-D-RA1 (horizontal)
- Follows Altera App Note 736. See readme.txt in project directory for more details.
This alterawiki page is for general information, example designs, and literature for the BeMicro CV A9 kit.
If you require technical support or have a design request for this or any other BeMicro board, please e-mail bemicro@arrow.com.
Any other discussions, suggestions, or questions should be posted on alteraforum.com with "BeMicro CV A9" in the subject line.
Any other additions to this page will be deleted.
Community support is provided Monday to Friday. Other contact methods are available here.
Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.
For more complete information about compiler optimizations, see our Optimization Notice.