Converting Xilinx RAM initialization coe/mif format to Intel PSG (Altera) mif

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Description: This forum article is dedicated to help users convert their Xilinx design RAM initialization coe/mif files to Intel PSG (Altera) mif/hex format. This article will walk through the process of converting a Xilinx RAM initialization file into an Intel PSG (Altera) RAM initialization file. Included in the article are two scripts that can be run to convert a Xilinx mif file into Altera mif file format.

• The Xilinx Block Memory Generator in Vivado uses an input .coe file for memory initialization. coe files for block memory usually looks as follows:

; Sample coe file for 16 bit wide and 8 deep memory
memory_initialization_radix=16;
memory_initialization_vector=FFFF ABCD F000 3333 1111 0000 0101 AAAA;

OR

; Sample coe file for 16 bit wide and 8 deep memory
memory_initialization_radix=16;
memory_initialization_vector= FFFF, ABCD, F000, 3333, 1111, 0000, 0101, AAAA;

OR

; Sample coe file for 8 bit wide and 8 deep memory
memory_initialization_radix=2;
memory_initialization_vector=
11111111,
10101011,
11110000,
00110011,
00010001,
00000000,
00000001,
10101010;

• When Vivado creates the IP using the coe initialization file, it will spit out a mif file. For example, if creating a True Dual Port RAM called tdp1 using the Block Memory Generator for a Vivado project called test_project, the mif file may default to a location as follows:
  • /<user_dir>/test_project/test_project.srcs/sources_1/ip/tdp1/tdp1.mif
  • The Block Memory Generator created the mif file based on the coe file. 
  • The mif file for the first coe example shown above would look as follows:

1111111111111111
1010101111001101
1111000000000000
0011001100110011
0001000100010001
0000000000000000
0000000100000001
1010101010101010

• One you have the Xilinx mif file, it can be converted to the Intel PSG (Altera) mif file equivalent for use as a Block Memory initialization file.
• The Intel PSG (Altera) format for a mif file can be found here:
  • https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/reference/glossary/def_mif.htm
  • Here are some examples of Intel PSG (Altera) mif files for RAM initialization.

-- Sample mif file for 16 bit wide 8 deep memory
DEPTH = 8;
WIDTH = 16;
ADDRESS_RADIX = DEC;
DATA_RADIX = BIN;
CONTENT
BEGIN
0: 1111111111111111;
1: 1010101111001101;
2: 1111000000000000;
3: 0011001100110011;
4: 0001000100010001;
5: 0000000000000000;
6: 0000000100000001;
7: 1010101010101010;
END;

-- Sample mif file for 8 bit wide 16 deep memory
DEPTH = 16;
WIDTH = 8;
ADDRESS_RADIX = HEX;
DATA_RADIX = HEX;
CONTENT
BEGIN
0: FF;
1: AB;
2: F0;
3: 33;
4: 11;
5: 00;
6: 01;
7: AA;
8: FF;
9: AB;
A: F0;
B: 33;
C: 11;
D:00;
E: 01;
F: A1;
END;

• For reference, the hex file format for Intel PSG (Altera) Block RAM can be found here:
  • https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/reference/glossary/def_hexfile.htm
• Two script examples are shown below to help automate the conversion from Xilinx to Intel PSG (Altera) RAM mif initialization files.
  • The two scripts use the Xilinx Block Memory Generator mif file creation as input and produce the equivalent Intel PSG (Altera) RAM mif initialization file.
  • One script is in Python while the other is Tcl based depending on preference for scripting.

• Python mif conversion script (X_to_A_mif_conversion.py)

#Convert Xilinx Mif to Altera MIF
#Ex of How to run Script for a 16x8 (16 bit wide, 8 deep) Xilinx Block RAM:
#python X_altera_mif_conversion.py -d 8 -w 16 -i Xilinx_mif.mif -o intel_mif.mif
#If your Xilinx MIF (Xilinx_mif.mif) is a 8x16 (dxw) MIF generated in Vivado/ISE, 
#the command above will generate a intel MIF file intel_mif.mif in the correct 
#format that will pass Quartus synthesis. 
import sys, getopt, struct

def convert_mif(ifile, ofile, depth, width):
               fp_out=open(ofile, "w")
               fp_out.write("DEPTH = " + str(depth) + ";" + "\n" + "\n")
               fp_out.write("WIDTH = " + str(width) + ";" + "\n" + "\n" + "\n")
               fp_out.write("ADDRESS_RADIX = DEC;\n")
               fp_out.write("DATA_RADIX = BIN;\n\n\n")
               fp_out.write("CONTENT\n")
               fp_out.write("BEGIN\n")
               fp_in=open(ifile, "r")
               lines = fp_in.readlines()
               i=0
               for line in lines:
                               fp_out.write(str(i) + " : " + line.rstrip() + ";" + "\n")
                               i = i+1
               fp_out.write("END;")
               fp_in.close()
               fp_out.close()
               print("Converted Xilinx MIF: " + ifile + " To Intel PSG MIF: " + ofile)

 def main(argv):
               inputfile = ''
               outputfile = ''
               depth = 0
               width = 0
               try:
                               opts, args = getopt.getopt(argv,"hd:w:i:o:")
               except getopt.GetoptError:
                               print 'X_altera_mif_conversion.py -d <depth> -w <width> -i <inputfile> -o <outputfile>'
                               sys.exit(2)
               for opt, arg in opts:
                               if opt == '-h':
                                               print 'X_altera_mif_conversion.py -d <depth> -w <width> -i <inputfile> -o <outputfile>'
                                               sys.exit()
                               elif opt == '-d':
                                               depth = arg
                               elif opt == '-w':
                                               width = arg
                               elif opt == "-i":
                                               inputfile = arg
                               elif opt == "-o":
                                               outputfile = arg
               print 'Input file is ', inputfile
               print 'Output file is ', outputfile
               print 'depth is ', depth
               print 'width is ', width
               convert_mif(inputfile, outputfile, depth, width)  

if __name__ == "__main__":
  main(sys.argv[1:])

• Tcl mif conversion script (X_to_A_mif_conversion.tcl)

# X_to_A_mif_conversion.tcl
# This script will convert a Xilinx mif file to an Intel PSG (Altera) mif file
# mif files are often used as initialization files for FPGA RAM implementations
# 
# usage from a tcl console window in Quartus or from a tcl shell
# > X_to_A_mif_conversion.tcl
#  No arguments will print out all options needed for the script
#  X_to_A_mif_conversion.tcl <depth> <width> <input_file> <output_file>
#
# Example
# > X_to_A_mif_conversion.tcl 1024 16 X_1024x16.mif a_1024x16.mif
#
if {$argc == 0} {
 puts ""
 puts "Usage:"
 puts "X_to_A_mif_conversion.tcl <depth> <width> <input_file> <output_file>"
 puts ""
 exit
} elseif {$argc != 4} {
 puts ""
 puts "Incorrect number of arguments"
 puts "X_to_A_mif_conversion.tcl <depth> <width> <input_file> <output_file>"
 puts ""
 exit
} 

set depth  [lindex $argv 0]
set width  [lindex $argv 1]
set filein [lindex $argv 2]
set fileout [lindex $argv 3]

if {[file exists $filein] == 0} {
 puts "input file $filein does not exist"
 exit
} 

set fin [open $filein r]
set fout [open $fileout w]

set timestamp_decimal [clock format [clock seconds] -format {%Y %m %d %H %M %S}]

puts $fout "-- Created by X_to_A_mif_conversion.tcl"
puts $fout "-- MIF CREATION TIMESTAMP = $timestamp_decimal"
puts $fout "DEPTH = $depth;                  -- The size of memory in words"
puts $fout "WIDTH = $width;                   -- The size of data in bits"
puts $fout "ADDRESS_RADIX = DEC;         -- The radix for address values"
puts $fout "DATA_RADIX = BIN;            -- The radix for data values"
puts $fout "CONTENT                      -- start of (address : data pairs)"
puts $fout "BEGIN"
puts $fout ""

set i 0
while { [gets $fin data] >= 0 } {
  puts $fout "$i : $data;"
  incr i
}

puts $fout "END;" 

close $fin
close $fout