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The low memory, which kernel can access without TLB, is 0x0-0x1fffffff physical address (512MB span). Divide this by 2 gives 256MB. In order to run a single kernel image on different hardware using fdt, we should setup a hardware design guide line that sdram base should be at 0x10000000 physical address. All other components, such as flash, serial and ethernet, should be placed in 0x00000000-0x0fffffff (256MB span).
1. Add a 512B or 1KB dual-port tightly coupled memory. Connect one port to tightly_coupled_instruction_master, and the other port to tightly_coupled_data_master. Both ports must be located at the same address.
2. Include MMU to your Nios II processor using SOPC builder. Assign "Fast TLB Miss Exception Vector" to the tightly coupled memory. You may use default MMU setting.
You may find a golden reference design for 3C120 dev board, which is the default_mmu in kernel config.
Nios II Hardware Reference Design for Linux, Cyclone III (EP3C120) Edition Release R15 (download .zip file via FTP)
There is another example for NEEK at, (though the TSE doesn't work on this design). This is the custom_fpga in kernel config.
The information in this section does not apply to the most recent Nios2 Linux Kernel anymore. Please refer to the Devicetree article for how to get the SOPC definitions into your kernel.
The kernel and uClinux-dist support boards definition.
cd nios2-linux/linux-2.6/arch/nios2/boards
cp -a neek my_nios2
Edit Kconfig in boards dir to include your board.
menu "NiosII board configuration"
choice
prompt "board configuration"
config 3C120
bool "3C120 dev board"
help
The Altera 3C120 dev board support.
config NEEK
bool "Nios Embedded Evaluation Kit"
help
The Altear Nios Embedded Evaluation Kit support.
config MY_NIOS2
bool "my nios2 custom board"
help
My nios2 custom board support.
endchoice
source "arch/nios2/boards/3c120/Kconfig"
source "arch/nios2/boards/neek/Kconfig"
source "arch/nios2/boards/my_nios2/Kconfig"
endmenu
Edit Makefile in boards dir to include your board.
board-$(CONFIG_3C120) := 3c120
board-$(CONFIG_NEEK) := neek
board-$(CONFIG_MY_NIOS2) := my_nios2
BOARD := $(board-y)
export BOARD
ifneq ($(board-y),)
core-y += arch/$(ARCH)/boards/$(BOARD)/
KBUILD_AFLAGS += -Iarch/$(ARCH)/boards/$(BOARD)/include
KBUILD_CPPFLAGS += -Iarch/$(ARCH)/boards/$(BOARD)/include
KBUILD_CFLAGS += -Iarch/$(ARCH)/boards/$(BOARD)/include
endif
Edit Kconfig in boards/my_nios2 dir.
if MY_NIOS2
choice
prompt "FPGA configuration"
config MY_NIOS2_FPGA
bool "MY NIOS2 FPGA"
help
Adapt the kernel to custom FPGA configuration. You will
need to generate a header file for your desgin using the
"sopc-create-header-files" scripts provided by Altera.
The file "include/asm/my_nios2_fpga.h" in this board dir
will be used.
endchoice
endif
The new kernel doesn't use hwselect script, it uses sopc generated header instead.
Run this in your quartus project dir (with quartus 8.1 or later),
sopc-create-header-files --single my_nios2_fpga.h
cp my_nios2_fpga.h nios2-linux/linux-2.6/arch/nios2/boards/my_nios2/include/asm
In nios2-linux/linux-2.6/arch/nios2/boards/my_nios2/include/asm/nios.h:
#ifndef _ASM_NIOS2_H__
#define _ASM_NIOS2_H__
#if defined(CONFIG_MY_NIOS2_FPGA)
#include <asm/my_nios2_fpga.h>
#define DDR2_TOP_BASE DDR_SDRAM_BASE
#define DDR2_TOP_SPAN DDR_SDRAM_SPAN
#define TIMER_1MS_FREQ SYS_CLK_TIMER_FREQ
#define TIMER_1MS_BASE SYS_CLK_TIMER_BASE
#define TIMER_1MS_SPAN SYS_CLK_TIMER_SPAN
#define TIMER_1MS_IRQ SYS_CLK_TIMER_IRQ
#define GPIO_LED1 0
#else
#error "No FPGA configuration selected"
#endif
....
cd nios2-linux/uClinux-dist/vendors/Altera
cp -a nios2 my_nios2
cd uClinux-dist
make menuconfig # select Altera,my_nios2. kernel config your FPGA.
* NiosII board configuration
*
board configuration
> 1. 3C120 dev board (3C120)
2. Nios Embedded Evaluation Kit (NEEK)
3. my nios2 custom board (MY_NIOS2) (NEW)
choice[1-3]: 3
make
You can save your config setting within uClinux-dist.
Kernel/Library/Defaults Selection -->
[*] Update Default Vendor Settings
It is important that you should save your files to git, e.g. git-gui.
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