It is important that the Quartus configuration file settings (configuration scheme and bitstream compression) are set to match the MSEL pins on the board. If these settings don't match the MSEL pins, the HPS won't be able to configure the FPGA.
1. From the Quartus "Assigments" menu, click "Device..."
5. Click "OK" in the "Device and Pin Options" window.
6. Click "OK" in the "Device" window.
7. From the Quartus "Project" menu, select "Add/Remove Files in Project..."
8. In the window which appears, note the file "soc_system/synthesis/soc_system.qip". This file is automatically added to Quartus and points to the source files which QSys generates. As this is not a Quartus class, much of the Quartus setup is already done, allowing you to focus on the SoC specific tasks in Quartus.
9. Click :OK:
10. You will need to make the SDRAM IO standard assignments. While Quartus will auto-assign the HPS SDRAM pins, the IO assignments must be added to the project. This is best done with a TCL script generated by QSys. To make these assignments, Quartus will first need to analyze the source files.
From the Quartus "Processing" menu, select "Start", then "Start Analysis & Synthesis". This will generate the database so that IO assignments can be made.
12. From the Quartus "Processing" menu, select "Start Compilation". This will compile your design and generate a programming file.
Anytime you change the HPS configuration and re-compile the Quartus project, you will need to update the boot loader. Using a boot loader and a programming file with different HPS configurations can cause boot failures. In the next section you will regenerate the boot loader.
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