The ability to configure your FPGA with a new image from files stored on a remote PC via ethernet
Get example .FLASH files to try out this feature from RemoteSystemUpdateExamples here.
STEP 1: Apply power to the NEEK board by plugging the power cable and pressing switch SW1.
The application selector will appear, and you will see a button on the botton right that says "Not Connected"
STEP 2:Using an Ethernet Cable, connect the Ethernet RJ-45 jack on the LCD Multimedia HSMC to a working network port.
The connection to the ethernet port wil by detected and attempts to find a suitable IP address will be take place during which time you should see "Connecting..." message.
Getting an IP address may take a few minutes
STEP 3: On completion the acquired IP address will be displayed on the LCD Screen.
STEP 4: Ensure your host PC is connected to a working network port. Launch a web browser window.
STEP 5: On the host PC, in the web browser type in the IP address displayed on the LCD screen e.g. (type 188.8.131.52)
You should now see a web page displayed on the web browser. The contents of this page are stored in the webserver_htmlfolder on your SD Card
STEP 6: On the upper left hand side on the web form, click on the link under "Read the Instructions".
STEP 7: For this next step you will need to a new FPGA image to download to the Flash on your host PC.
STEP 8': On the remote system update instructions page, you will see a CFI 'Flash Upload section. Click Browse and navigate to the location of the Flash file containing the FPGA hardware image to be downloaded. Click Open.
STEP 9: On the web page click Upload.
Wait while the Flash file is transferred to your board. On completion you will be directed to Program CFI Flash button.
STEP 10: Click on Program Flash. Depending on the size of the file this step should take a few minutes to complete.
STEP 11: Click on Return to instructions, and repeat the previous 2 steps but this time browse to and Upload the Flash file containing the FPGA software image. (If your application has no software portion then ignore this step and go to the next step). Upon completion you will be directed to the Reset System option.
STEP 12: Click on Reset System button. The FPGA should now reconfigure form the newly programmed contents of the Flash.
To create .Flash files you must have install the Nios II EDS and Quartus II FPGA design software.
METHOD 1: USE 2 COMMANDS
sof2flash --activeparallel --input="<MySofName>.sof" --output="<MyFlashName_hw>.flash" --offset="RECONFIG_ADDRESS"
Note: The Reconfig address that the application expects is 0xe00000.
elf2flash --base=0x04000000 --end=0x04FFFFFF --reset=0x04240000 --input="<MyElfName>.elf" --output="<MyFlashName_sw>.flash"
Method 2: <a href="/RemoteSystemUpdateExamples">USE A SCRIPT
Use the Application Selector with Remote System Update example design as a starting point for your default FPGA image. Use your design as the "Production" image that may be updated as your design evolves.
You can get the Application Selector design examples from your Nios II Embedded Evaluation Kit Install CD or by visiting www.altera.com/nios2eval page.
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