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Quartus Prime Pro IEEE 1735 Encryption

Quartus Prime Pro IEEE 1735 Encryption




This wiki page is dedicated towards users that want to use the IEEE1735 encryption utility included with Quartus Prime Pro software. The following documentation can be helpful, but can be misleading to do simple encryption of RTL in a design.

This article goes hand in hand with an instructional video located here.

How to use Intel® Quartus® Prime Pro IEEE1735


Two design examples are available. One is a project before encryption of a module called shifter_en.v and the other is a project after encryption of a module called shifter_en.v

IEEE 1735 pre encrypt.qar - See attached

IEEE 1735 post encrypt.qar - See attached

encrypt_1735 usage




encrypt_1735 [-h | --help[=<option|topic>] | -v]

encrypt_1735 <other options>







-f <argument file>




--language=<verilog | systemverilog| vhdl>




--simulation[=<aldec | cadence | mentor | synopsys (comma delimited)>]


Help Topics:






For more information on specific options, use --help=<option|topic>.

Command used in the instructional video

encrypt_1735 --quartus --language=verilog shifter_en.v

Steps listed until video is available

  • No need to update the RTL with header/footer info shown in documentation.
  • Encrypt the file via encrypt_1735 usage section
  • Copy original RTL to .v.orig (.vhd.orig) then change name from .vp to .v (.vhdp to .vhd).
  • Remove qdb and compile.


IEEE 1735 encryption IEEE1735 encryption IEEE_1735 encryption Quartus Prime Pro encrypt_1735 IEEE1735 encryption

Version history
Revision #:
3 of 3
Last update:
‎06-26-2020 09:25 AM
Updated by: