Community
cancel
Showing results for 
Search instead for 
Did you mean: 

Serial Digital Interface

Serial Digital Interface


Serial Digital Interface II (SDI II)

Example Design

Implementation of Arria 10 ES3 Triple Rate SDI II TX Refclk Switching Feature

Click link below to this reference design:

Implementation of Arria 10 ES3 Triple Rate SDI II TX Refclk Switching Feature


Triple-rate SDI II Reference Design for Stratix V, Arria V & Cyclone V devices

Click link below to this reference design:

Triple-rate SDI II Reference Design for Stratix V, Arria V & Cyclone V devices


Triple-Rate SDI II Simple Design

Click link below to this reference design:

Triple-Rate SDI II Simple Design


Triple Rate SDI II Implementing Tx PLL Dynamic Switching Feature for Arria V Device

Click link below to this reference design:

Triple Rate SDI II Implementing Tx PLL Dynamic Switching Feature for Arria V Device


SDI II & CVO IP video mode detection and switching feature

Click link below to this reference design:

CVO_IP_video_mode_detection_and_switching_feature


Triple Rate SDI II Quad Instance Simulation/Compilation Design Example

Click link below to this reference design:

Triple Rate SDI II Quad Instance Simulation/Compilation Design Example


SDI Automated Switching Module

Click link below to this reference design:

SDI Automated Switching Module


Debug Checklist

FTA Arria 10 SDI II TX and RX Issue Isolation

Click link below to this Fault Tree Analysis:

FTA Arria 10 SDI II TX and RX Issue Isolation


SDI II MegaCore Debug Checklist

Click link below to this checklist:

SDI II MegaCore Debug Checklist

Serial Digital Interface (SDI) - Example Design

Triple-rate SDI Reference Design for Cyclone V devices

Click link below to this reference design:

Triple-rate SDI Reference Design for Cyclone V devices


Migration from SDI to SDI II

Click link below to follow the steps of migration from SDI to SDI II:

Migration from SDI to SDI II


Triple-Rate SDI Implementing Tx Mux Feature for Stratix IV GX Device

Click link below to this reference design:

Triple Rate SDI Implementing Tx Mux Feature for Stratix IV Device


SDI-ASI Combo - Auto Detect Reference Design for Stratix IV GX Devices

This reference design demonstrates the SDI-ASI auto protocol detector based on the combination of the current Altera SDI and ASI MegaCore® functions,and shows how to demonstrate the SDI-ASI combo block with the Stratix® IV GX

Stratix IV GX audio video development board.

The SDI-ASI_combo TX is able to transmit SD, HD, 3G and ASI video signal.

The SDI-ASI_combo RX is able to receive SD, HD, 3G and ASI video signal.

Software requirement: Quartus II 12.0 sp1 or later Quartus Version with using the SDI lib attached in this project.

Hardware Requirement : Stratix IV GX FPGA development board and SDI HSMC

Reference NoteSDI-ASI Auto Detect Reference Design for Stratix IV GX Devices 

Download : s4gx_sdi_sdi_asi_combo.qar

readme: S4gx_sdi_asi_combo_Readme.txt

 

Triple-Standard SDI in PMA DIRECT Mode Reference Design for Stratix IV GX Devices.

The reference design demonstrates how SDI can be implemented in PMA DIRECT Mode, which able to be fit at regular transceiver channel and CMU channel. There are total of 6 SDI in PMA DIRECT Mode successfully fit in this reference design.

Software requirement   : Quartus II 10.0 sp1 or later Quartus Version with using the SDI lib attached in this project.

Hardware Requirement : Audio Video Development Kit, Stratix IV GX Edition Stratix IV GX FPGA development board and SDI HSMC

Reference Application Note: Refer to AN 600: Serial Digital Interface Reference Design for Stratix IV Devices

Parameter:

The parameters °ENABLE_DUPLEX_PMA_DIRECT" is only supported in this Lib.

This parameter is not exist if you are instantiating a new SDI Duplex Instance.

sdi_megacore_top_inst.ENABLE_DUPLEX_PMA_DIRECT = 1'b1, // Support for PMA DIrect

sdi_megacore_top_inst.ENABLE_DUPLEX_PMA_DIRECT = 1'b0, // Support for Regular Transceiver Channel

Starting Channel Number:

The starting channel number for each instance is incremented by factor 8, eg: 0,8,16,24,32,40

Limitation of this reference design:

-Only Support for SDI Duplex Instance

-Fitting Test is only done for one transceiver quad, as shown in this reference design.

-Limited Test.

Only SDI Channel 0 and Channel 1 on the design are completely tested. The behaviour of SDI in PMA Direct Mode can be demonstrated through the 2 channels of HSMC daughter card.

SDI Channel 2 to Channel 5 are designed for fitting test, to show that SDI in PMA Direct Mode can be fitted in 4 regular channels and 2 CMU Channel in the same Quad. Due to hardware limitation, not all transceiver quads can fully fit this design.

Download : s4gx_sdi_pma_direct 

readme : s4gx_sdi_pma_direct Readme.txt

 


SDI Flywheel Video Decoder Reference Design

The reference design demonstrates SDI Flywheel Video Decoder reference design based on current Altera SDI MegaCore Function.

Software requirement   : Quartus II 9.1 or later Quartus Version with using the SDI lib attached in this project.

Hardware Requirement : Stratix II GX Audio Video development board

Guide : SDI_Flywheel_Video_Decoder.pdf 

Design File : SDI_Flywheel_Video_Decoder.qar

Version history
Revision #:
1 of 1
Last update:
‎06-26-2019 09:20 PM
Updated by:
 
Contributors