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This Level 2 article guides the user through the creation, instantiation, connection, and use of an Avalon MM Master as a part of a complete transceiver design. This article is a part of the complete Transceiver Design Flow series of articles.
Avalon Memory-Mapped (Avalon-MM) Masters are used to talk to
1) Talk to the Transceiver PHY IP in order to write to/read from the control and status registers. For more information, see the chapter that corresponds to the specific PHY you are implementing in the V-Series Transceiver PHY IP Core User Guide.
2) Talk to the Reconfiguration Controller to write to /read from the reconfiguration control space within the Transceiver PHY IP. For a PHY Layer Transceiver Design, the Avalon MM Master controls the Reconfiguration Controller through the Reconfiguration Management Interface.
For technical details about the Avalon MM Interface, including signals and timing diagrams, see Chapter 3 of the Avalon Specification.
The Avalon MM Master can be a user module or a microcontroller. Communication between it's slave, however, must follow the Avalon MM Specification.
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