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Hi,
I'm trying to understand GEN Assembly code of OpenCL. One question:
What does "Compacted " meaning in GEN ASM? like this asm code:
mov (8|M0) r10.0<1>:f r124.0<8;8,1>:d {Compacted}
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Hi Chris,
Thanks for reaching out to us
EU (Execution Unit) native instructions are 128 bits (16 bytes) wide. Some combinations of instruction options can use compact instruction formats that are 64 bits (8 bytes) wide. Identifying instructions that can be compacted and creating the compact representations is done by software tools, including compilers and assemblers.
Please refer the following link for detailed information
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol07-3d_media_gpgpu_3.pdf
Under section >> EU compact instructions (page no. 943)
Regards
Vidya
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Hi Chris,
Thanks for reaching out to us
EU (Execution Unit) native instructions are 128 bits (16 bytes) wide. Some combinations of instruction options can use compact instruction formats that are 64 bits (8 bytes) wide. Identifying instructions that can be compacted and creating the compact representations is done by software tools, including compilers and assemblers.
Please refer the following link for detailed information
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol07-3d_media_gpgpu_3.pdf
Under section >> EU compact instructions (page no. 943)
Regards
Vidya
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Hi Vidya,
Thanks for your answer. It's clear enough. Thanks!
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Hi,
Thanks for the confirmation!
As this issue has been resolved, we will no longer respond to this thread.
If you require any additional assistance from Intel, please start a new thread.
Any further interaction in this thread will be considered community only.
Have a Good day.
Thanks & Regards
Vidya

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