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Does the QM57 chipset support peer to peer PCIe communication (two PCIe end points talking to each other without going through the processor)?
I have looked through all the documentation I can find, and I haven't been able to find it explicitly stated anywhere.
Is it typical for a general purpose PCH to support peer to peer PCIe communcation?
- Tags:
- PCIe
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Still trying to find this information.
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