[ACPI] Processor Register Block access

[medinad]

Hello,
I came from processor's forum at Intel Support Community where they cannot resolve my problem, and send me here.

I am playing with the acpi specification and a basic OS. I would like to implement some acpi functions over this OS. One of them is the processor control (throttling). It is managed thought the Processor Register Block (P_BLK). but I can not find a way to locate this register block.

I saw intel and ACPI web page (acpi.info). I downloaded the specification from last one.

I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.

The OS I am working with is MaRTE OS (http://marte.unican.es), a Hard RTOS with a Minimal RT POSIX.13 subset. I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.

I would like to know how to locate this register block (P_BLK). Not how to use it (by now).

Thank you.
Daniel M.

[Gael_H_Intel]

Quoting - medinad

Hello,
I came from processor's forum at Intel Support Community where they cannot resolve my problem, and send me here.

I am playing with the acpi specification and a basic OS. I would like to implement some acpi functions over this OS. One of them is the processor control (throttling). It is managed thought the Processor Register Block (P_BLK). but I can not find a way to locate this register block.

I saw intel and ACPI web page (acpi.info). I downloaded the specification from last one.

I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.

The OS I am working with is MaRTE OS (http://marte.unican.es), a Hard RTOS with a Minimal RT POSIX.13 subset. I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.

I would like to know how to locate this register block (P_BLK). Not how to use it (by now).

Thank you.
Daniel M.

Hello Daniel,

Unfortunately we cannot help you here either - we support developers who are working with Intel Active Management Technology. You might want to send your question to the Intel support email.

--Gael

[medinad]

Quoting - Gael Holmes (Intel)

Quoting - medinad

Hello,
I came from processor's forum at Intel Support Community where they cannot resolve my problem, and send me here.

I am playing with the acpi specification and a basic OS. I would like to implement some acpi functions over this OS. One of them is the processor control (throttling). It is managed thought the Processor Register Block (P_BLK). but I can not find a way to locate this register block.

I saw intel and ACPI web page (acpi.info). I downloaded the specification from last one.

I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.

The OS I am working with is MaRTE OS (http://marte.unican.es), a Hard RTOS with a Minimal RT POSIX.13 subset. I am working at a low level programing (C) read/writing into the registers, not the specification's ASL or AML. And I am starting with the acpi component architecture (ACPICA), but I do not found the throttling configuration in it.

I would like to know how to locate this register block (P_BLK). Not how to use it (by now).

Thank you.
Daniel M.

Hello Daniel,

Unfortunately we cannot help you here either - we support developers who are working with Intel Active Management Technology. You might want to send your question to the Intel support email.

--Gael

Hi,

Sorry, I feel a little confused about Intel Forums.

And thanks about your suggestion.

Regards. Daniel.

[Shmuel_G_Intel]

Quoting - medinad

Sorry, I feel a little confused about Intel Forums.
And thanks about your suggestion.
Regards. Daniel.

Hi Daniel...
Do try the excellent suggestion by Gael, but I would not discard the ISN forums completely.


Why don't you try other forumsfrom the ISN Forums page?
You can try either the multi core (Threading on Parallel Architectures) forum, like John S suggested, or maybe the CPU Instructions forum.
It is worth to try -- they may not know the answer, but maybe they can give you yet another direction or suggestion :).

Good luck!

[medinad]

Quoting - Shmuel Gershon (Intel)

Hi Daniel...
Do try the excellent suggestion by Gael, but I would not discard the ISN forums completely.


Why don't you try other forumsfrom the ISN Forums page?
You can try either the multi core (Threading on Parallel Architectures) forum, like John S suggested, or maybe the CPU Instructions forum.
It is worth to try -- they may not know the answer, but maybe they can give you yet another direction or suggestion :).

Good luck!

Thank you.

I found a new kind of registers that allow me do what I want.
MSR that could be read with RDMSR and write WRMSR (It was hard to me find how to use that registers).

registers are: IA32_CLOCK_MODULATION, IA32_MPERF and IA32_APERF.

Thanks.
Daniel M.