LMT missing some of the Lanes data

[DiJin]

Hello,

I was using LMT 0.77 version to test CPU RX Margin with 5 loops on Ubuntu 22, but after the test is done, there is some lanes data missing on some slots. The server is with SRF SP CPU, GEN5 4 lanes SSD. we do see this issue from different customers. But SSD RX margin works fine.

I searched on the manual, and find this:

"Failure occurs (Read at the Margining Lane Status Register is not the
expected), that is, “10 ms has passed since ‘Report SetErrorCountLimit’
command was issued. Exiting Margining”.

But didnt find any further information.

I attached the two fail signature in the screenshot, and also from the data result screenshot, you could see only the last loop has all the four lanes data. some lanes data are missing in the first 4 loops.

Thanks,

Di