Cannot run vertor_add project from oneAPI-samples on hardware in jupyterlab

[wan11]

Hi, 

I tried to compile and run vector_add project on hardware in jupyterlab using following steps but failed. I put the tutorials I used below.

vector_add project is from https://github.com/oneapi-src/oneAPI-samples/tree/master/DirectProgramming/C%2B%2BSYCL/DenseLinearAlgebra/vector-add

However, after I submit the job to a Stratix10 node using the below command:

qsub -l nodes=1:stratix10:ppn=2 -d . -l walltime=24:00:00 build_fpga.sh, I found this job only run 1 minute. 

Build files have been written to: /home/u208539/repository/DirectProgramming/C++SYCL/DenseLinearAlgebra/vector-add/build.

But no vector-add-buffers.fpga was found.  the status while using "qstat" shows this job is finish.

Is there anything else I need to do？ Any help would be appreciated!

I followed this tutorial.

https://community.intel.com/t5/Intel-DevCloud/No-FPGA-board-found-in-Devcloud-jupyterLab/m-p/1555699#M9432

1. Open the JupyterLab environment in Intel DevCloud for oneAPI.

2. Open a terminal window from the launcher window as explained above.

3. Clone the official oneAPI samples repository:

git clone https://github.com/oneapi-src/oneAPI-samples.git repository

4. Move to the vector-add sample directory:

cd repository/DirectProgramming/C++SYCL/DenseLinearAlgebra/vector-add/

5. Create a build_fpga.sh file in the directory with the following lines to compile and run the vector-add sample:

 Building the vector-add sample for Stratix10 FPGA card:

mkdir build

cd build

cmake .. -DFPGA_DEVICE=intel_s10sx_pac:pac_s10

make fpga

6. Once the build_fpga.sh file is created, you can submit the job to a Stratix10 node using the below command:

qsub -l nodes=1:stratix10:ppn=2 -d . -l walltime=24:00:00 build_fpga.sh

7. The above command submits the job to a stratix10 node for building and running. This can take a couple of hours to complete. You can monitor the status of the job using the below command:

qstat

This will show if the job is in running state or not as shown below:

8. Once the job is complete, it will create two files, an output and error file, build_fpga.o<job_id> and build_fpga.e<job_id> which contains the output and error logs respectively.

You can find the vector-add-buffers.fpga application inside the build directory which can be run on a Stratix 10 node obtained using the command:

qsub -I -l nodes=1:stratix10:ppn=2 -d .

cd build

./vector-add-buffers.fpga

 Thank you,

Wan

[JesusE_Intel]

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