Does mvNCProfile.pyc support custom new layers ?

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I want to use mvNCProfile.pyc to analysis my model.

but there are some new layers, so I add some code to caffe. It can be compiled and installed successful.But when I use mvNCProfile.pyc, Toolkit Error will happened, Stage Type Not Supported:So, Does mvNCProfile.pyc support custom new layers ?

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@cuihao1993 NC SDK (mvNCProfile.pyc) doesn't yet support custom layers, but we are looking at alternate ways to give developers more flexibility. Additional framework support is one of those efforts.

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@AshwinVijayakumar so it is impossible to run inference on custom models at the moment, or did you just mean the profiling?

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@macsz Not possible to run custom layers; not possible to get access to Myriad VPUs (unless buying in large volumes - no possibility to make prototype hardware); not possible to get access to hardware technical references for the VPU. If you want to actually do anything meaningful for a Myriad VPU, you're probably out of luck - I've been in contact with Movidius who have told me to even bother asking unless I can throw a cash cow their way.

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@SubZero The Neural Compute Stick is not a development board but final product. Think of it as a hardware accelerator for getting inferences with a predefined CNN by using very low power compared to other methods for doing the computations. Normally companies do not give much information about internals of their final products unless you become a partner and sign NDA.

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@georgievm_cms Whether it's a development board, or full fledged hardware, does not negate the fact that people will be buying this in order to create CNN prototypes. If the tools aren't up to par to allow anything but the most basic CNNs, then it's only natural that engineers playing with this hardware will want access to the references in order to extend the functionality of the SDK. The Myriad VPUs are quite powerful, so why not allow this power to be exploited by engineers who want to do just that?

I'm not asking Movidius to divulge trade secrets detailing the internal workings of the Myriad VPUs. I asked specifically for programmers reference manuals, ie, hardware at the register level, etc, which an engineer working with a manufacturer's hardware would be required to be aware of. Every piece of hardware which I have been required to develop software for, or integrate into a design, I have been able to gain access to technical references for.

Either way, based on trying to deal with Movidius, I've moved onto the Tegra SoCs anyhow.

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@SubZero I asked specifically for programmers reference manuals, ie, hardware at the register level, etc, which an engineer working with a manufacturer's hardware would be required to be aware of. Every piece of hardware which I have been required to develop software for, or integrate into a design, I have been able to gain access to technical references for.

There is huge difference between APU and VPU. Movidius as far as I know doesnt need to expose to the datasheet unless you are bringing up your own hardware(which I do infact and I have access) I have no idea how you could compare Tegra to Movidius as they arent one and the same. In Movidius (specific to this forum) you write high level parallelization code for your neurons to do specific math operation. From all I know having been using Movidius as a camera processing unit as well as neural network accelerator, I can say that understanding the parallelization instructions is the key if you are writing your own kernels for NN. You need to understand register level if you are dealing with NN side of things.

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@macsz What custom layers are we talking here? As far my knowledge in the NN goes, if Movidius support TF or Caffe framework for specific models(CNN, RNN) they will provide necessary kernels for the operations underneath. Subject to the memory limitation wrt network and hyper parameters, if a network could fit into their intermediate graph blob, it should work. So when you say custom layers, I am confused. Are you talking about custom operation instead or custom network architecture outside supported ones?

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@subash The necessity for a reference is for the very specific purpose of implementing deficiencies in the SDK. The reference should contain information about SHAVE instructions (VLIW instructions), addresses to upload SHAVE code, or to access registers in the various units in order to schedule code execution, access status, etc.

You just completely contradicted yourself in that you first stated that "you don't require a programmers reference unless you are bringing up your own hardware". After this, you state that the key to writing your own kernels (or ops, or layers), is the understanding of the parallelization instructions (or SHAVE machine code), which is exactly what is contained in a programmers reference. If I was required to write code for a new SoC, I would be required to get access to a programmers reference, which provides information on the various hardware units in the SoC - registers for the modules, memory maps, instructions, etc.

Re: Comparing Tegra and Myriad - are you sure you have access to a Myriad license? Both the Tegra and Myriad processors have specialized vector processing units which can be used to execute highly parallelized code for the acceleration of CNN processing or other vision tasks.

What you described about CNN function is relatively limited. The general operations supplied by Tensorflow or Caffe provide a relatively small subset of operations - convolutions, max pooling, etc. In order to do more advanced CNNs, it is often required to implement functions to provide functionality beyond those basic operations. As the Myriad SDK is quite basic, there is no current way of implementing those operations.