Intel® Distribution of OpenVINO™ Toolkit
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Updated fpga_support_files.tgz for OpenVINO 2019R1

DOBROSOLETS__KONSTAN
484 Views

Hi
Looks like fpga_support_files.tgz wasn't updated for R1 release.
At least here fpga_support_files.tgz download link is for previous release. Thus I can't update and use my Mustang-F100 card.

Link for updated fpga_support_files.tgz is appreciated.

Regards
Konstantin

0 Kudos
7 Replies
Shubha_R_Intel
Employee
484 Views

Dear Konstantin,

In the below document, configuration steps for (IEI's Mustang-F100-A10) on Linux are detailed:

https://docs.openvinotoolkit.org/2019_R1/_docs_install_guides_VisionAcceleratorFPGA_Configure_2018R5.html

Thanks,

Shubha

DOBROSOLETS__KONSTAN
484 Views

Hi Shubha
Thank you for reply but it doesn't solve my problem. I do not need R5 instructions.

I've installed OpenVINO 2019'R1. Now I need to update Mustang-F100 card.
fpga_support_files.tgz available to download is outdated; scripts and firmware are for R5.
So where can I get updated fpga_support_files.tgz which will work for R1? Please provide the link.

Regards
Konstantin

David_D_Intel
Employee
484 Views

The new fpga_support_files archive will be updated shortly.  I'll post an update after it's available for download.

Akira_S_Intel
Employee
484 Views

Hi all,

I have the same issue, and it seems that this problem hasn't been solved yet.
When is the newest fpga_support_files.tgz going to be published? 

Regards,
Akira, Shoji

Ulf_H_Intel
Employee
484 Views

I have the same problem and am unable to use the Mustang F100-A10 with OpenVINO 2019 R1. When will a new FPGA support package be available please? Thanks. Ulf

Konstantin_D_Intel
484 Views

Hi

Looks like fpga_support_files archive was updated, but I'm not sure that the 2019R1 firmware there is the right one. I've updated flash image with jic file from "bringup" folder. And when I try to program FPGA device with precompiled bitstream I see the following:

 

fpgauser@fpganode:~$ aocl program acl0 /opt/intel/openvino/bitstreams/a10_vision_design_bitstreams/2019R1_PL1_FP11_ResNet_SqueezeNet_VGG.aocx
aocl program: Running program from /opt/altera/aocl-pro-rte/aclrte-linux64/board/a10_1150_sg1/linux64/libexec
Programming device: a10gx_2ddr : Intel Vision Accelerator Design with Intel Arria 10 FPGA (acla10_1150_sg10)
MMD INFO : [acla10_1150_sg10] Quartus versions for base and import compile do not match
MMD INFO : [acla10_1150_sg10] Board is currently programmed with sof from Quartus 18.1.1 263
MMD INFO : [acla10_1150_sg10] PR import was compiled with Quartus 18.1.0 222
MMD INFO : [acla10_1150_sg10] Reprogram the device with data saving and restoring
MMD INFO : [acla10_1150_sg10] Trying Partial Reconfiguration
MMD INFO : [acla10_1150_sg10] Quartus versions for base and import compile do not match
MMD INFO : [acla10_1150_sg10] Board is currently programmed with sof from Quartus 18.1.1 263
MMD INFO : [acla10_1150_sg10] PR import was compiled with Quartus 18.1.0 222

To me it looks like BSP was compiled with 18.1.1 263, but bistreams were compiled with 18.1.0 222. I believe this version mismatch have to be resolved either with updated bitstreams or with proper BSP.

Looking forward for updates.

Regards
Konstantin

RVija
Beginner
484 Views

Please let us know if it is updated. It is now in critical path.

Thank you.

Reply