Max10 vccio power sequence

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Max10 vccio power sequence

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Hi,

I want to use a Max10 FPGA (10M04DAF256) with two different VccIO voltages: 3.3V and 1.8V.

The issue is that the 3.3V and 1.8V power supplies will not ramp at the same time.

Banks 1B and 8 will be powered by 3.3V at the same time as the VCC, VCCINT, VCCA, VCCD_PLL.

But Bank 3 and 4 will be powered later (can be up to 1 second later) by 1.8V.

Will the Max10 be configured and operational on its banks 1B and 8 in the mean time ? (in the interval of time between the apparition of the 3.3V and the apparition of the 1.8V)

Thank you.

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