I am studying on VHDL language with ISE Design Suite 14.7 (Basys-2 board). And I want to design 8 bit Register (PC), (it has several conditions these are below).

[malol]

Design an 8-bit register (PC):

* when its "Increment" input is activated, it adds 1 to its content.

* when its "Load” input is activated, it stores the data given from 8-bit input of "Address".

* it gives its content to the 8-bit output of "PcOutput" directly.

[KeenYewL_Intel]

Hi there, you have come to Intel FPGA forum, I'm afraid we do not have the expertise to help you with ISE design suite. I would hereby close this thread.