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Altera_Forum
Honored Contributor I
1,717 Views

İnitialization Ram with VHDL

Hi, 

 

As you know, in Verilog, initialize $readmemh code is initialized Ram simply. I searched a VHDL code like this but i can't get. Do you help me to find this code? If you know a sample, can you share with me ?  

 

Thanks.
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11 Replies
Altera_Forum
Honored Contributor I
65 Views

In quartus, there are only 2 ways to initialise a ram using VHDL: 

 

1. using a function to set all values. 

2. Use a mif file in conjuntion with a megawizard generated altsyncram. 

 

Annoyingly, you cannot use textio to read data in from a text file (like you can with verilog and X based FPGAs).
Altera_Forum
Honored Contributor I
65 Views

If this is for simulation purpose, then initialize the memory content when u create them, but you need to use simulator like ModelSim 

 

If this is an actual circuit then you MUST use mif file to initialize memory content. The programmer tool will initialize the memory when it programs the FPGA.
Altera_Forum
Honored Contributor I
65 Views

Hey 

 

Can you help me, how can i use a .mif file to initialize a RAM, can you give me the steps to do in the programming phase with vhdl language ... or give me an exemple of that (how i should write) .... 

 

thank's in advance ........
Altera_Forum
Honored Contributor I
65 Views

Go to the megawizard 

create a ram with the specifications you need and specify a mif file to initialise the ram from.
Altera_Forum
Honored Contributor I
65 Views

thank's but can you tell me where can i found the megawizard because i am a new user of the quartus II ???

Altera_Forum
Honored Contributor I
65 Views

Tools menu -> megawizard

Altera_Forum
Honored Contributor I
65 Views

thank you it is working fine (i think) just another questions can i write the resulte in a file like .mif using a RAM ?? if there is another way please tell me about it  

thank's again .....
Altera_Forum
Honored Contributor I
65 Views

what results? from a testbench or from a real board?

Altera_Forum
Honored Contributor I
65 Views

from a simulation ( i have an image in jpg ==> i trasnfert it in mif file ligne by ligne ) then i have a bloc creating in vhdl who will read from the ROM the pixels one by one and do some processing and give in result another value for the pixel (like a convolution) me i want to write this result in a file so i can use it after in MATLAB. 

 

I hope i was clear .........
Altera_Forum
Honored Contributor I
65 Views

VHDL allows you to read and write from text files using the std.textio library

Altera_Forum
Honored Contributor I
65 Views

 

--- Quote Start ---  

If this is for simulation purpose, then initialize the memory content when u create them, but you need to use simulator like ModelSim 

 

If this is an actual circuit then you MUST use mif file to initialize memory content. The programmer tool will initialize the memory when it programs the FPGA. 

--- Quote End ---  

 

 

can you elaborate why you must use a .mif in Quartus? i use initialized contents after declaring the RAM/ROM specifically because it works in synthesis and simulation. the Quartus II HDL templates are also built this way
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