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DE1-SoC FPGA Ethernet

Altera_Forum
Honored Contributor II
1,332 Views

Hi, I am working on a project using the DE1-SoC. In short, (1) I receive data via a custom UART implemented on the board's GPIO pins from an Arduino with a SIM900 module attached to it, (2) the data is parsed within the FPGA logic and (3) will be sent over the board's ethernet port to my server.  

 

 

A way of achieving (3) is, to read from FPGA registers via H2F bridge using a kernel module or user space application, on Linux running on HPS. I wish however to avoid overhead, so I'd like to route traffic to/from PHY from/to FPGA. Additionally, will I then be able to also use Ethernet for HPS at the same time? Looking at the Cyclone V handbook, I understand this is possible, using EMAC, but I'm still a beginner and would kindly appreciate if you could point me to any useful resources/tutorials for achieving this final step in my project. If however, it's not possible using the DE1-SoC board, which board would you recommend for the project? Many thanks.
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2 Replies
Altera_Forum
Honored Contributor II
192 Views

Hi, the DE1-SoC only has an Ethernet PHY connected to the HPS EMAC, as such, even if the FPGA can support an MAC IP, there is no PHY that you can hook up to. Unless of course, you use expansion card that utilizes the GPIO expansion header on the FPGA. If you are not using the HPS for any other purpose except just to read back the data, you can opt for boards such as the Max 10 (http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=218&no=998) that has the Ethernet PHY on the FPGA side. 

 

The downside is you will need to regenerate the Linux portion of the design, but thankfully there is a guide for this specific board located here:https://rocketboards.org/foswiki/view/documentation/alteramax1010m50revcdevelopmentkitlinuxsetup
Altera_Forum
Honored Contributor II
192 Views

That is most helpful, thank you sunshine.

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