Hello, I wonder if someone could please help me. I'm using an Avalon-MM DMA for interfacing between my host application and the FPGA SDRAM. The thing is, I can't get more than 10MB/s throughput for read/write operations. My host code is quite simple (pseudocode):
char* data = (char*)malloc(128MB); //or some other value. 128MB is what I've got on my DE2i, so that's the maximum value allowed here.
for(i = 0; i < 128MB; ++i)
data = rand();
time = clock();
DMAWrite(SDRAM_ADDR, data, size(128MB));
DMARead(SDRAM_ADDR, data, size(128MB));
total time = clock() - time;
throughput = 128MB/total time;
My qsys design is also very simple: http://www.alteraforum.com/forum/attachment.php?attachmentid=10952&stc=1 Full img: http://1drv.ms/1ovvaw3 I'm using the Jungo driver provided on the demonstrations of the SystemCD of the board. Am I missing something? Can I improve the system performance? I need a somewhat bigger throughput, something around 90MB/s at least, but any possible improvement is welcome. Many thanks.